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c7d77a7980
Signed-off-by: Ingo Molnar <mingo@kernel.org>
101 lines
2.6 KiB
C
101 lines
2.6 KiB
C
/*
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* Copyright (C) 2013-2014, Linaro Ltd.
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* Author: Al Stone <al.stone@linaro.org>
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* Author: Graeme Gregory <graeme.gregory@linaro.org>
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* Author: Hanjun Guo <hanjun.guo@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation;
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*/
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#ifndef _ASM_ACPI_H
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#define _ASM_ACPI_H
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#include <linux/irqchip/arm-gic-acpi.h>
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#include <linux/mm.h>
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#include <linux/psci.h>
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#include <asm/cputype.h>
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#include <asm/smp_plat.h>
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/* Macros for consistency checks of the GICC subtable of MADT */
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#define ACPI_MADT_GICC_LENGTH \
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(acpi_gbl_FADT.header.revision < 6 ? 76 : 80)
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#define BAD_MADT_GICC_ENTRY(entry, end) \
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(!(entry) || (unsigned long)(entry) + sizeof(*(entry)) > (end) || \
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(entry)->header.length != ACPI_MADT_GICC_LENGTH)
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/* Basic configuration for ACPI */
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#ifdef CONFIG_ACPI
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/* ACPI table mapping after acpi_gbl_permanent_mmap is set */
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static inline void __iomem *acpi_os_ioremap(acpi_physical_address phys,
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acpi_size size)
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{
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if (!page_is_ram(phys >> PAGE_SHIFT))
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return ioremap(phys, size);
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return ioremap_cache(phys, size);
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}
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#define acpi_os_ioremap acpi_os_ioremap
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typedef u64 phys_cpuid_t;
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#define PHYS_CPUID_INVALID INVALID_HWID
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#define acpi_strict 1 /* No out-of-spec workarounds on ARM64 */
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extern int acpi_disabled;
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extern int acpi_noirq;
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extern int acpi_pci_disabled;
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static inline void disable_acpi(void)
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{
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acpi_disabled = 1;
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acpi_pci_disabled = 1;
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acpi_noirq = 1;
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}
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static inline void enable_acpi(void)
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{
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acpi_disabled = 0;
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acpi_pci_disabled = 0;
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acpi_noirq = 0;
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}
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/*
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* The ACPI processor driver for ACPI core code needs this macro
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* to find out this cpu was already mapped (mapping from CPU hardware
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* ID to CPU logical ID) or not.
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*/
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#define cpu_physical_id(cpu) cpu_logical_map(cpu)
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/*
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* It's used from ACPI core in kdump to boot UP system with SMP kernel,
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* with this check the ACPI core will not override the CPU index
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* obtained from GICC with 0 and not print some error message as well.
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* Since MADT must provide at least one GICC structure for GIC
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* initialization, CPU will be always available in MADT on ARM64.
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*/
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static inline bool acpi_has_cpu_in_madt(void)
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{
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return true;
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}
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static inline void arch_fix_phys_package_id(int num, u32 slot) { }
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void __init acpi_init_cpus(void);
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#else
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static inline void acpi_init_cpus(void) { }
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#endif /* CONFIG_ACPI */
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static inline const char *acpi_get_enable_method(int cpu)
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{
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return acpi_psci_present() ? "psci" : NULL;
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}
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#ifdef CONFIG_ACPI_APEI
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pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
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#endif
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#endif /*_ASM_ACPI_H*/
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