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e72bba2135
While it was convenient to have a generic ring structure that served both Tx and Rx sides, next commits are going to introduce several Tx-specific fields, so in order to avoid hurting the Rx side, let's pull out the Tx ring onto new ice_tx_ring and ice_rx_ring structs. Rx ring could be handled by the old ice_ring which would reduce the code churn within this patch, but this would make things asymmetric. Make the union out of the ring container within ice_q_vector so that it is possible to iterate over newly introduced ice_tx_ring. Remove the @size as it's only accessed from control path and it can be calculated pretty easily. Change definitions of ice_update_ring_stats and ice_fetch_u64_stats_per_ring so that they are ring agnostic and can be used for both Rx and Tx rings. Sizes of Rx and Tx ring structs are 256 and 192 bytes, respectively. In Rx ring xdp_rxq_info occupies its own cacheline, so it's the major difference now. Signed-off-by: Maciej Fijalkowski <maciej.fijalkowski@intel.com> Tested-by: Gurucharan G <gurucharanx.g@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
217 lines
6.8 KiB
C
217 lines
6.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (C) 2021, Intel Corporation. */
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#ifndef _ICE_PTP_H_
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#define _ICE_PTP_H_
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#include <linux/ptp_clock_kernel.h>
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#include <linux/kthread.h>
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#include "ice_ptp_hw.h"
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enum ice_ptp_pin_e810 {
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GPIO_20 = 0,
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GPIO_21,
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GPIO_22,
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GPIO_23,
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NUM_PTP_PIN_E810
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};
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enum ice_ptp_pin_e810t {
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GNSS = 0,
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SMA1,
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UFL1,
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SMA2,
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UFL2,
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NUM_PTP_PINS_E810T
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};
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struct ice_perout_channel {
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bool ena;
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u32 gpio_pin;
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u64 period;
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u64 start_time;
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};
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/* The ice hardware captures Tx hardware timestamps in the PHY. The timestamp
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* is stored in a buffer of registers. Depending on the specific hardware,
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* this buffer might be shared across multiple PHY ports.
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*
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* On transmit of a packet to be timestamped, software is responsible for
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* selecting an open index. Hardware makes no attempt to lock or prevent
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* re-use of an index for multiple packets.
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*
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* To handle this, timestamp indexes must be tracked by software to ensure
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* that an index is not re-used for multiple transmitted packets. The
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* structures and functions declared in this file track the available Tx
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* register indexes, as well as provide storage for the SKB pointers.
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*
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* To allow multiple ports to access the shared register block independently,
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* the blocks are split up so that indexes are assigned to each port based on
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* hardware logical port number.
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*/
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/**
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* struct ice_tx_tstamp - Tracking for a single Tx timestamp
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* @skb: pointer to the SKB for this timestamp request
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* @start: jiffies when the timestamp was first requested
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*
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* This structure tracks a single timestamp request. The SKB pointer is
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* provided when initiating a request. The start time is used to ensure that
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* we discard old requests that were not fulfilled within a 2 second time
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* window.
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*/
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struct ice_tx_tstamp {
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struct sk_buff *skb;
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unsigned long start;
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};
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/**
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* struct ice_ptp_tx - Tracking structure for all Tx timestamp requests on a port
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* @work: work function to handle processing of Tx timestamps
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* @lock: lock to prevent concurrent write to in_use bitmap
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* @tstamps: array of len to store outstanding requests
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* @in_use: bitmap of len to indicate which slots are in use
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* @quad: which quad the timestamps are captured in
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* @quad_offset: offset into timestamp block of the quad to get the real index
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* @len: length of the tstamps and in_use fields.
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* @init: if true, the tracker is initialized;
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*/
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struct ice_ptp_tx {
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struct kthread_work work;
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spinlock_t lock; /* lock protecting in_use bitmap */
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struct ice_tx_tstamp *tstamps;
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unsigned long *in_use;
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u8 quad;
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u8 quad_offset;
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u8 len;
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u8 init;
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};
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/* Quad and port information for initializing timestamp blocks */
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#define INDEX_PER_QUAD 64
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#define INDEX_PER_PORT (INDEX_PER_QUAD / ICE_PORTS_PER_QUAD)
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/**
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* struct ice_ptp_port - data used to initialize an external port for PTP
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*
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* This structure contains PTP data related to the external ports. Currently
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* it is used for tracking the Tx timestamps of a port. In the future this
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* structure will also hold information for the E822 port initialization
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* logic.
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*
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* @tx: Tx timestamp tracking for this port
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*/
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struct ice_ptp_port {
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struct ice_ptp_tx tx;
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};
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#define GLTSYN_TGT_H_IDX_MAX 4
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/**
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* struct ice_ptp - data used for integrating with CONFIG_PTP_1588_CLOCK
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* @port: data for the PHY port initialization procedure
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* @work: delayed work function for periodic tasks
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* @extts_work: work function for handling external Tx timestamps
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* @cached_phc_time: a cached copy of the PHC time for timestamp extension
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* @ext_ts_chan: the external timestamp channel in use
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* @ext_ts_irq: the external timestamp IRQ in use
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* @kworker: kwork thread for handling periodic work
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* @perout_channels: periodic output data
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* @info: structure defining PTP hardware capabilities
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* @clock: pointer to registered PTP clock device
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* @tstamp_config: hardware timestamping configuration
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*/
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struct ice_ptp {
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struct ice_ptp_port port;
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struct kthread_delayed_work work;
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struct kthread_work extts_work;
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u64 cached_phc_time;
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u8 ext_ts_chan;
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u8 ext_ts_irq;
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struct kthread_worker *kworker;
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struct ice_perout_channel perout_channels[GLTSYN_TGT_H_IDX_MAX];
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struct ptp_clock_info info;
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struct ptp_clock *clock;
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struct hwtstamp_config tstamp_config;
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};
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#define __ptp_port_to_ptp(p) \
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container_of((p), struct ice_ptp, port)
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#define ptp_port_to_pf(p) \
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container_of(__ptp_port_to_ptp((p)), struct ice_pf, ptp)
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#define __ptp_info_to_ptp(i) \
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container_of((i), struct ice_ptp, info)
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#define ptp_info_to_pf(i) \
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container_of(__ptp_info_to_ptp((i)), struct ice_pf, ptp)
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#define PTP_SHARED_CLK_IDX_VALID BIT(31)
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#define ICE_PTP_TS_VALID BIT(0)
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/* Per-channel register definitions */
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#define GLTSYN_AUX_OUT(_chan, _idx) (GLTSYN_AUX_OUT_0(_idx) + ((_chan) * 8))
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#define GLTSYN_AUX_IN(_chan, _idx) (GLTSYN_AUX_IN_0(_idx) + ((_chan) * 8))
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#define GLTSYN_CLKO(_chan, _idx) (GLTSYN_CLKO_0(_idx) + ((_chan) * 8))
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#define GLTSYN_TGT_L(_chan, _idx) (GLTSYN_TGT_L_0(_idx) + ((_chan) * 16))
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#define GLTSYN_TGT_H(_chan, _idx) (GLTSYN_TGT_H_0(_idx) + ((_chan) * 16))
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#define GLTSYN_EVNT_L(_chan, _idx) (GLTSYN_EVNT_L_0(_idx) + ((_chan) * 16))
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#define GLTSYN_EVNT_H(_chan, _idx) (GLTSYN_EVNT_H_0(_idx) + ((_chan) * 16))
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#define GLTSYN_EVNT_H_IDX_MAX 3
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/* Pin definitions for PTP PPS out */
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#define PPS_CLK_GEN_CHAN 3
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#define PPS_CLK_SRC_CHAN 2
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#define PPS_PIN_INDEX 5
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#define TIME_SYNC_PIN_INDEX 4
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#define N_EXT_TS_E810 3
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#define N_PER_OUT_E810 4
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#define N_PER_OUT_E810T 3
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#define N_PER_OUT_E810T_NO_SMA 2
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#define N_EXT_TS_E810_NO_SMA 2
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#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)
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struct ice_pf;
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int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr);
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int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr);
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int ice_get_ptp_clock_index(struct ice_pf *pf);
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s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb);
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void ice_ptp_process_ts(struct ice_pf *pf);
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void
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ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring,
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union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb);
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void ice_ptp_init(struct ice_pf *pf);
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void ice_ptp_release(struct ice_pf *pf);
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#else /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */
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static inline int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr)
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{
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return -EOPNOTSUPP;
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}
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static inline int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr)
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{
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return -EOPNOTSUPP;
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}
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static inline int ice_get_ptp_clock_index(struct ice_pf *pf)
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{
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return -1;
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}
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static inline s8
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ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb)
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{
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return -1;
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}
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static inline void ice_ptp_process_ts(struct ice_pf *pf) { }
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static inline void
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ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring,
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union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb) { }
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static inline void ice_ptp_init(struct ice_pf *pf) { }
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static inline void ice_ptp_release(struct ice_pf *pf) { }
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#endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */
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#endif /* _ICE_PTP_H_ */
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