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c6d2b22eb5
OCTEON chips with the CIU3 interrupt controller use a different IPI mechanism that previous models. Add plat_smp_ops for the cn78xx and probing code to choose between the two types of ops. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12499/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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| .. | ||
| crypto | ||
| executive | ||
| cpu.c | ||
| csrc-octeon.c | ||
| dma-octeon.c | ||
| flash_setup.c | ||
| Kconfig | ||
| Makefile | ||
| oct_ilm.c | ||
| octeon_boot.h | ||
| octeon-irq.c | ||
| octeon-memcpy.S | ||
| octeon-platform.c | ||
| Platform | ||
| setup.c | ||
| smp.c | ||