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c6549f0eef
PHY block or asynchronous reset requires signal to be asserted before de-asserting. Driver is only de-asserting signal which is already low, hence reset operation is a no-op. Fix this by asserting signal first. Also, resetting requires PHY clocks to be turned ON only after reset is finished. Fix that as well. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> |
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.. | ||
Kconfig | ||
Makefile | ||
phy-qcom-apq8064-sata.c | ||
phy-qcom-ipq806x-sata.c | ||
phy-qcom-qmp.c | ||
phy-qcom-qusb2.c | ||
phy-qcom-ufs-i.h | ||
phy-qcom-ufs-qmp-14nm.c | ||
phy-qcom-ufs-qmp-14nm.h | ||
phy-qcom-ufs-qmp-20nm.c | ||
phy-qcom-ufs-qmp-20nm.h | ||
phy-qcom-ufs.c | ||
phy-qcom-usb-hs.c | ||
phy-qcom-usb-hsic.c |