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a781e5aa59
The system might go into suspend during recovery of any remoteproc. This will interrupt the recovery process in between increasing the recovery time. Make the platform device as wakeup capable and use pm_stay_wake/pm_relax APIs to avoid system from going into suspend during recovery. Signed-off-by: Siddharth Gupta <sidgup@codeaurora.org> Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org> Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/1588183482-21146-1-git-send-email-rishabhb@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
728 lines
16 KiB
C
728 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996
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*
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* Copyright (C) 2016 Linaro Ltd
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* Copyright (C) 2014 Sony Mobile Communications AB
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* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
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*/
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#include <linux/clk.h>
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#include <linux/firmware.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <linux/pm_runtime.h>
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#include <linux/qcom_scm.h>
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#include <linux/regulator/consumer.h>
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#include <linux/remoteproc.h>
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#include <linux/soc/qcom/mdt_loader.h>
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#include <linux/soc/qcom/smem.h>
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#include <linux/soc/qcom/smem_state.h>
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#include "qcom_common.h"
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#include "qcom_q6v5.h"
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#include "remoteproc_internal.h"
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struct adsp_data {
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int crash_reason_smem;
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const char *firmware_name;
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int pas_id;
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bool has_aggre2_clk;
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bool auto_boot;
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char **active_pd_names;
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char **proxy_pd_names;
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const char *ssr_name;
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const char *sysmon_name;
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int ssctl_id;
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};
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struct qcom_adsp {
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struct device *dev;
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struct rproc *rproc;
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struct qcom_q6v5 q6v5;
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struct clk *xo;
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struct clk *aggre2_clk;
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struct regulator *cx_supply;
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struct regulator *px_supply;
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struct device *active_pds[1];
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struct device *proxy_pds[3];
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int active_pd_count;
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int proxy_pd_count;
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int pas_id;
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int crash_reason_smem;
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bool has_aggre2_clk;
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struct completion start_done;
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struct completion stop_done;
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phys_addr_t mem_phys;
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phys_addr_t mem_reloc;
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void *mem_region;
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size_t mem_size;
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struct qcom_rproc_glink glink_subdev;
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struct qcom_rproc_subdev smd_subdev;
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struct qcom_rproc_ssr ssr_subdev;
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struct qcom_sysmon *sysmon;
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};
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static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds,
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size_t pd_count)
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{
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int ret;
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int i;
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for (i = 0; i < pd_count; i++) {
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dev_pm_genpd_set_performance_state(pds[i], INT_MAX);
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ret = pm_runtime_get_sync(pds[i]);
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if (ret < 0)
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goto unroll_pd_votes;
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}
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return 0;
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unroll_pd_votes:
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for (i--; i >= 0; i--) {
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dev_pm_genpd_set_performance_state(pds[i], 0);
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pm_runtime_put(pds[i]);
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}
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return ret;
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};
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static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds,
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size_t pd_count)
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{
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int i;
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for (i = 0; i < pd_count; i++) {
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dev_pm_genpd_set_performance_state(pds[i], 0);
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pm_runtime_put(pds[i]);
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}
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}
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static int adsp_load(struct rproc *rproc, const struct firmware *fw)
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{
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struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
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return qcom_mdt_load(adsp->dev, fw, rproc->firmware, adsp->pas_id,
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adsp->mem_region, adsp->mem_phys, adsp->mem_size,
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&adsp->mem_reloc);
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}
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static int adsp_start(struct rproc *rproc)
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{
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struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
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int ret;
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qcom_q6v5_prepare(&adsp->q6v5);
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ret = adsp_pds_enable(adsp, adsp->active_pds, adsp->active_pd_count);
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if (ret < 0)
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goto disable_irqs;
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ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
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if (ret < 0)
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goto disable_active_pds;
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ret = clk_prepare_enable(adsp->xo);
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if (ret)
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goto disable_proxy_pds;
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ret = clk_prepare_enable(adsp->aggre2_clk);
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if (ret)
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goto disable_xo_clk;
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ret = regulator_enable(adsp->cx_supply);
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if (ret)
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goto disable_aggre2_clk;
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ret = regulator_enable(adsp->px_supply);
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if (ret)
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goto disable_cx_supply;
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ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
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if (ret) {
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dev_err(adsp->dev,
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"failed to authenticate image and release reset\n");
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goto disable_px_supply;
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}
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ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000));
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if (ret == -ETIMEDOUT) {
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dev_err(adsp->dev, "start timed out\n");
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qcom_scm_pas_shutdown(adsp->pas_id);
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goto disable_px_supply;
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}
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return 0;
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disable_px_supply:
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regulator_disable(adsp->px_supply);
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disable_cx_supply:
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regulator_disable(adsp->cx_supply);
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disable_aggre2_clk:
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clk_disable_unprepare(adsp->aggre2_clk);
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disable_xo_clk:
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clk_disable_unprepare(adsp->xo);
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disable_proxy_pds:
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adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
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disable_active_pds:
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adsp_pds_disable(adsp, adsp->active_pds, adsp->active_pd_count);
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disable_irqs:
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qcom_q6v5_unprepare(&adsp->q6v5);
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return ret;
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}
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static void qcom_pas_handover(struct qcom_q6v5 *q6v5)
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{
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struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
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regulator_disable(adsp->px_supply);
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regulator_disable(adsp->cx_supply);
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clk_disable_unprepare(adsp->aggre2_clk);
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clk_disable_unprepare(adsp->xo);
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adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
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}
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static int adsp_stop(struct rproc *rproc)
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{
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struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
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int handover;
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int ret;
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ret = qcom_q6v5_request_stop(&adsp->q6v5);
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if (ret == -ETIMEDOUT)
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dev_err(adsp->dev, "timed out on wait\n");
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ret = qcom_scm_pas_shutdown(adsp->pas_id);
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if (ret)
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dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
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adsp_pds_disable(adsp, adsp->active_pds, adsp->active_pd_count);
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handover = qcom_q6v5_unprepare(&adsp->q6v5);
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if (handover)
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qcom_pas_handover(&adsp->q6v5);
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return ret;
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}
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static void *adsp_da_to_va(struct rproc *rproc, u64 da, size_t len)
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{
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struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
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int offset;
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offset = da - adsp->mem_reloc;
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if (offset < 0 || offset + len > adsp->mem_size)
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return NULL;
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return adsp->mem_region + offset;
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}
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static unsigned long adsp_panic(struct rproc *rproc)
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{
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struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
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return qcom_q6v5_panic(&adsp->q6v5);
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}
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static const struct rproc_ops adsp_ops = {
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.start = adsp_start,
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.stop = adsp_stop,
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.da_to_va = adsp_da_to_va,
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.parse_fw = qcom_register_dump_segments,
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.load = adsp_load,
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.panic = adsp_panic,
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};
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static int adsp_init_clock(struct qcom_adsp *adsp)
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{
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int ret;
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adsp->xo = devm_clk_get(adsp->dev, "xo");
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if (IS_ERR(adsp->xo)) {
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ret = PTR_ERR(adsp->xo);
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if (ret != -EPROBE_DEFER)
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dev_err(adsp->dev, "failed to get xo clock");
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return ret;
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}
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if (adsp->has_aggre2_clk) {
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adsp->aggre2_clk = devm_clk_get(adsp->dev, "aggre2");
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if (IS_ERR(adsp->aggre2_clk)) {
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ret = PTR_ERR(adsp->aggre2_clk);
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if (ret != -EPROBE_DEFER)
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dev_err(adsp->dev,
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"failed to get aggre2 clock");
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return ret;
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}
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}
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return 0;
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}
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static int adsp_init_regulator(struct qcom_adsp *adsp)
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{
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adsp->cx_supply = devm_regulator_get(adsp->dev, "cx");
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if (IS_ERR(adsp->cx_supply))
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return PTR_ERR(adsp->cx_supply);
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regulator_set_load(adsp->cx_supply, 100000);
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adsp->px_supply = devm_regulator_get(adsp->dev, "px");
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return PTR_ERR_OR_ZERO(adsp->px_supply);
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}
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static int adsp_pds_attach(struct device *dev, struct device **devs,
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char **pd_names)
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{
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size_t num_pds = 0;
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int ret;
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int i;
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if (!pd_names)
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return 0;
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/* Handle single power domain */
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if (dev->pm_domain) {
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devs[0] = dev;
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pm_runtime_enable(dev);
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return 1;
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}
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while (pd_names[num_pds])
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num_pds++;
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for (i = 0; i < num_pds; i++) {
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devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]);
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if (IS_ERR_OR_NULL(devs[i])) {
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ret = PTR_ERR(devs[i]) ? : -ENODATA;
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goto unroll_attach;
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}
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}
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return num_pds;
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unroll_attach:
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for (i--; i >= 0; i--)
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dev_pm_domain_detach(devs[i], false);
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return ret;
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};
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static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds,
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size_t pd_count)
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{
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struct device *dev = adsp->dev;
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int i;
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/* Handle single power domain */
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if (dev->pm_domain && pd_count) {
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pm_runtime_disable(dev);
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return;
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}
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for (i = 0; i < pd_count; i++)
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dev_pm_domain_detach(pds[i], false);
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}
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static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
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{
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struct device_node *node;
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struct resource r;
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int ret;
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node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
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if (!node) {
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dev_err(adsp->dev, "no memory-region specified\n");
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return -EINVAL;
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}
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ret = of_address_to_resource(node, 0, &r);
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if (ret)
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return ret;
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adsp->mem_phys = adsp->mem_reloc = r.start;
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adsp->mem_size = resource_size(&r);
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adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
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if (!adsp->mem_region) {
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dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
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&r.start, adsp->mem_size);
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return -EBUSY;
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}
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return 0;
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}
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static int adsp_probe(struct platform_device *pdev)
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{
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const struct adsp_data *desc;
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struct qcom_adsp *adsp;
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struct rproc *rproc;
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const char *fw_name;
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int ret;
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desc = of_device_get_match_data(&pdev->dev);
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if (!desc)
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return -EINVAL;
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if (!qcom_scm_is_available())
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return -EPROBE_DEFER;
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fw_name = desc->firmware_name;
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ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
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&fw_name);
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if (ret < 0 && ret != -EINVAL)
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return ret;
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rproc = rproc_alloc(&pdev->dev, pdev->name, &adsp_ops,
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fw_name, sizeof(*adsp));
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if (!rproc) {
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dev_err(&pdev->dev, "unable to allocate remoteproc\n");
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return -ENOMEM;
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}
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rproc->auto_boot = desc->auto_boot;
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rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
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adsp = (struct qcom_adsp *)rproc->priv;
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adsp->dev = &pdev->dev;
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adsp->rproc = rproc;
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adsp->pas_id = desc->pas_id;
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adsp->has_aggre2_clk = desc->has_aggre2_clk;
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platform_set_drvdata(pdev, adsp);
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device_wakeup_enable(adsp->dev);
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ret = adsp_alloc_memory_region(adsp);
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if (ret)
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goto free_rproc;
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ret = adsp_init_clock(adsp);
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if (ret)
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goto free_rproc;
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ret = adsp_init_regulator(adsp);
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if (ret)
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goto free_rproc;
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ret = adsp_pds_attach(&pdev->dev, adsp->active_pds,
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desc->active_pd_names);
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if (ret < 0)
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goto free_rproc;
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adsp->active_pd_count = ret;
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ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds,
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desc->proxy_pd_names);
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if (ret < 0)
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goto detach_active_pds;
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adsp->proxy_pd_count = ret;
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ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem,
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qcom_pas_handover);
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if (ret)
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goto detach_proxy_pds;
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qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name);
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qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
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qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
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adsp->sysmon = qcom_add_sysmon_subdev(rproc,
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desc->sysmon_name,
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desc->ssctl_id);
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if (IS_ERR(adsp->sysmon)) {
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ret = PTR_ERR(adsp->sysmon);
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goto detach_proxy_pds;
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}
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ret = rproc_add(rproc);
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if (ret)
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goto detach_proxy_pds;
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return 0;
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detach_proxy_pds:
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adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
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detach_active_pds:
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adsp_pds_detach(adsp, adsp->active_pds, adsp->active_pd_count);
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free_rproc:
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rproc_free(rproc);
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return ret;
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}
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static int adsp_remove(struct platform_device *pdev)
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{
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struct qcom_adsp *adsp = platform_get_drvdata(pdev);
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rproc_del(adsp->rproc);
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qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
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qcom_remove_sysmon_subdev(adsp->sysmon);
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qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev);
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qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
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rproc_free(adsp->rproc);
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return 0;
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}
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static const struct adsp_data adsp_resource_init = {
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.crash_reason_smem = 423,
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.firmware_name = "adsp.mdt",
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.pas_id = 1,
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.has_aggre2_clk = false,
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.auto_boot = true,
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.ssr_name = "lpass",
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.sysmon_name = "adsp",
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.ssctl_id = 0x14,
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};
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static const struct adsp_data sm8150_adsp_resource = {
|
|
.crash_reason_smem = 423,
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|
.firmware_name = "adsp.mdt",
|
|
.pas_id = 1,
|
|
.has_aggre2_clk = false,
|
|
.auto_boot = true,
|
|
.active_pd_names = (char*[]){
|
|
"load_state",
|
|
NULL
|
|
},
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
NULL
|
|
},
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|
.ssr_name = "lpass",
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|
.sysmon_name = "adsp",
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|
.ssctl_id = 0x14,
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|
};
|
|
|
|
static const struct adsp_data sm8250_adsp_resource = {
|
|
.crash_reason_smem = 423,
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|
.firmware_name = "adsp.mdt",
|
|
.pas_id = 1,
|
|
.has_aggre2_clk = false,
|
|
.auto_boot = true,
|
|
.active_pd_names = (char*[]){
|
|
"load_state",
|
|
NULL
|
|
},
|
|
.proxy_pd_names = (char*[]){
|
|
"lcx",
|
|
"lmx",
|
|
NULL
|
|
},
|
|
.ssr_name = "lpass",
|
|
.sysmon_name = "adsp",
|
|
.ssctl_id = 0x14,
|
|
};
|
|
|
|
static const struct adsp_data msm8998_adsp_resource = {
|
|
.crash_reason_smem = 423,
|
|
.firmware_name = "adsp.mdt",
|
|
.pas_id = 1,
|
|
.has_aggre2_clk = false,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
NULL
|
|
},
|
|
.ssr_name = "lpass",
|
|
.sysmon_name = "adsp",
|
|
.ssctl_id = 0x14,
|
|
};
|
|
|
|
static const struct adsp_data cdsp_resource_init = {
|
|
.crash_reason_smem = 601,
|
|
.firmware_name = "cdsp.mdt",
|
|
.pas_id = 18,
|
|
.has_aggre2_clk = false,
|
|
.auto_boot = true,
|
|
.ssr_name = "cdsp",
|
|
.sysmon_name = "cdsp",
|
|
.ssctl_id = 0x17,
|
|
};
|
|
|
|
static const struct adsp_data sm8150_cdsp_resource = {
|
|
.crash_reason_smem = 601,
|
|
.firmware_name = "cdsp.mdt",
|
|
.pas_id = 18,
|
|
.has_aggre2_clk = false,
|
|
.auto_boot = true,
|
|
.active_pd_names = (char*[]){
|
|
"load_state",
|
|
NULL
|
|
},
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
NULL
|
|
},
|
|
.ssr_name = "cdsp",
|
|
.sysmon_name = "cdsp",
|
|
.ssctl_id = 0x17,
|
|
};
|
|
|
|
static const struct adsp_data sm8250_cdsp_resource = {
|
|
.crash_reason_smem = 601,
|
|
.firmware_name = "cdsp.mdt",
|
|
.pas_id = 18,
|
|
.has_aggre2_clk = false,
|
|
.auto_boot = true,
|
|
.active_pd_names = (char*[]){
|
|
"load_state",
|
|
NULL
|
|
},
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
NULL
|
|
},
|
|
.ssr_name = "cdsp",
|
|
.sysmon_name = "cdsp",
|
|
.ssctl_id = 0x17,
|
|
};
|
|
|
|
static const struct adsp_data mpss_resource_init = {
|
|
.crash_reason_smem = 421,
|
|
.firmware_name = "modem.mdt",
|
|
.pas_id = 4,
|
|
.has_aggre2_clk = false,
|
|
.auto_boot = false,
|
|
.active_pd_names = (char*[]){
|
|
"load_state",
|
|
NULL
|
|
},
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
"mss",
|
|
NULL
|
|
},
|
|
.ssr_name = "mpss",
|
|
.sysmon_name = "modem",
|
|
.ssctl_id = 0x12,
|
|
};
|
|
|
|
static const struct adsp_data slpi_resource_init = {
|
|
.crash_reason_smem = 424,
|
|
.firmware_name = "slpi.mdt",
|
|
.pas_id = 12,
|
|
.has_aggre2_clk = true,
|
|
.auto_boot = true,
|
|
.ssr_name = "dsps",
|
|
.sysmon_name = "slpi",
|
|
.ssctl_id = 0x16,
|
|
};
|
|
|
|
static const struct adsp_data sm8150_slpi_resource = {
|
|
.crash_reason_smem = 424,
|
|
.firmware_name = "slpi.mdt",
|
|
.pas_id = 12,
|
|
.has_aggre2_clk = false,
|
|
.auto_boot = true,
|
|
.active_pd_names = (char*[]){
|
|
"load_state",
|
|
NULL
|
|
},
|
|
.proxy_pd_names = (char*[]){
|
|
"lcx",
|
|
"lmx",
|
|
NULL
|
|
},
|
|
.ssr_name = "dsps",
|
|
.sysmon_name = "slpi",
|
|
.ssctl_id = 0x16,
|
|
};
|
|
|
|
static const struct adsp_data sm8250_slpi_resource = {
|
|
.crash_reason_smem = 424,
|
|
.firmware_name = "slpi.mdt",
|
|
.pas_id = 12,
|
|
.has_aggre2_clk = false,
|
|
.auto_boot = true,
|
|
.active_pd_names = (char*[]){
|
|
"load_state",
|
|
NULL
|
|
},
|
|
.proxy_pd_names = (char*[]){
|
|
"lcx",
|
|
"lmx",
|
|
NULL
|
|
},
|
|
.ssr_name = "dsps",
|
|
.sysmon_name = "slpi",
|
|
.ssctl_id = 0x16,
|
|
};
|
|
|
|
static const struct adsp_data msm8998_slpi_resource = {
|
|
.crash_reason_smem = 424,
|
|
.firmware_name = "slpi.mdt",
|
|
.pas_id = 12,
|
|
.has_aggre2_clk = true,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"ssc_cx",
|
|
NULL
|
|
},
|
|
.ssr_name = "dsps",
|
|
.sysmon_name = "slpi",
|
|
.ssctl_id = 0x16,
|
|
};
|
|
|
|
static const struct adsp_data wcss_resource_init = {
|
|
.crash_reason_smem = 421,
|
|
.firmware_name = "wcnss.mdt",
|
|
.pas_id = 6,
|
|
.auto_boot = true,
|
|
.ssr_name = "mpss",
|
|
.sysmon_name = "wcnss",
|
|
.ssctl_id = 0x12,
|
|
};
|
|
|
|
static const struct of_device_id adsp_of_match[] = {
|
|
{ .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
|
|
{ .compatible = "qcom,msm8996-adsp-pil", .data = &adsp_resource_init},
|
|
{ .compatible = "qcom,msm8996-slpi-pil", .data = &slpi_resource_init},
|
|
{ .compatible = "qcom,msm8998-adsp-pas", .data = &msm8998_adsp_resource},
|
|
{ .compatible = "qcom,msm8998-slpi-pas", .data = &msm8998_slpi_resource},
|
|
{ .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init },
|
|
{ .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init },
|
|
{ .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init },
|
|
{ .compatible = "qcom,sc7180-mpss-pas", .data = &mpss_resource_init},
|
|
{ .compatible = "qcom,sdm845-adsp-pas", .data = &adsp_resource_init},
|
|
{ .compatible = "qcom,sdm845-cdsp-pas", .data = &cdsp_resource_init},
|
|
{ .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource},
|
|
{ .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource},
|
|
{ .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init},
|
|
{ .compatible = "qcom,sm8150-slpi-pas", .data = &sm8150_slpi_resource},
|
|
{ .compatible = "qcom,sm8250-adsp-pas", .data = &sm8250_adsp_resource},
|
|
{ .compatible = "qcom,sm8250-cdsp-pas", .data = &sm8250_cdsp_resource},
|
|
{ .compatible = "qcom,sm8250-slpi-pas", .data = &sm8250_slpi_resource},
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, adsp_of_match);
|
|
|
|
static struct platform_driver adsp_driver = {
|
|
.probe = adsp_probe,
|
|
.remove = adsp_remove,
|
|
.driver = {
|
|
.name = "qcom_q6v5_pas",
|
|
.of_match_table = adsp_of_match,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(adsp_driver);
|
|
MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver");
|
|
MODULE_LICENSE("GPL v2");
|