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e533dbe9dc
Since commit:d44f1b8dd7("arm64: KVM/mm: Move SEA handling behind a single 'claim' interface") ... the top-level APEI SEA handler has the shape: 1. current_flags = arch_local_save_flags() 2. local_daif_restore(DAIF_ERRCTX) 3. <GHES handler> 4. local_daif_restore(current_flags) However, since commit:4a503217ce("arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking") ... when pseudo-NMIs (pNMIs) are in use, arch_local_save_flags() will save the PMR value rather than the DAIF flags. The combination of these two commits means that the APEI SEA handler will erroneously attempt to restore the PMR value into DAIF. Fix this by factoring local_daif_save_flags() out of local_daif_save(), so that we can consistently save DAIF in step #1, regardless of whether pNMIs are in use. Both commits were introduced concurrently in v5.0. Cc: <stable@vger.kernel.org> Fixes:4a503217ce("arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking") Fixes:d44f1b8dd7("arm64: KVM/mm: Move SEA handling behind a single 'claim' interface") Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: James Morse <james.morse@arm.com> Cc: Julien Thierry <julien.thierry.kdev@gmail.com> Cc: Will Deacon <will@kernel.org> Signed-off-by: Will Deacon <will@kernel.org>
139 lines
3.2 KiB
C
139 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2017 ARM Ltd.
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*/
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#ifndef __ASM_DAIFFLAGS_H
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#define __ASM_DAIFFLAGS_H
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#include <linux/irqflags.h>
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#include <asm/arch_gicv3.h>
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#include <asm/barrier.h>
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#include <asm/cpufeature.h>
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#include <asm/ptrace.h>
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#define DAIF_PROCCTX 0
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#define DAIF_PROCCTX_NOIRQ PSR_I_BIT
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#define DAIF_ERRCTX (PSR_I_BIT | PSR_A_BIT)
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#define DAIF_MASK (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT)
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/* mask/save/unmask/restore all exceptions, including interrupts. */
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static inline void local_daif_mask(void)
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{
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WARN_ON(system_has_prio_mask_debugging() &&
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(read_sysreg_s(SYS_ICC_PMR_EL1) == (GIC_PRIO_IRQOFF |
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GIC_PRIO_PSR_I_SET)));
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asm volatile(
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"msr daifset, #0xf // local_daif_mask\n"
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:
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:
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: "memory");
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/* Don't really care for a dsb here, we don't intend to enable IRQs */
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if (system_uses_irq_prio_masking())
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gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET);
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trace_hardirqs_off();
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}
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static inline unsigned long local_daif_save_flags(void)
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{
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unsigned long flags;
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flags = read_sysreg(daif);
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if (system_uses_irq_prio_masking()) {
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/* If IRQs are masked with PMR, reflect it in the flags */
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if (read_sysreg_s(SYS_ICC_PMR_EL1) != GIC_PRIO_IRQON)
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flags |= PSR_I_BIT;
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}
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return flags;
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}
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static inline unsigned long local_daif_save(void)
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{
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unsigned long flags;
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flags = local_daif_save_flags();
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local_daif_mask();
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return flags;
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}
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static inline void local_daif_restore(unsigned long flags)
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{
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bool irq_disabled = flags & PSR_I_BIT;
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WARN_ON(system_has_prio_mask_debugging() &&
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!(read_sysreg(daif) & PSR_I_BIT));
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if (!irq_disabled) {
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trace_hardirqs_on();
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if (system_uses_irq_prio_masking()) {
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gic_write_pmr(GIC_PRIO_IRQON);
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pmr_sync();
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}
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} else if (system_uses_irq_prio_masking()) {
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u64 pmr;
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if (!(flags & PSR_A_BIT)) {
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/*
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* If interrupts are disabled but we can take
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* asynchronous errors, we can take NMIs
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*/
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flags &= ~PSR_I_BIT;
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pmr = GIC_PRIO_IRQOFF;
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} else {
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pmr = GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET;
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}
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/*
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* There has been concern that the write to daif
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* might be reordered before this write to PMR.
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* From the ARM ARM DDI 0487D.a, section D1.7.1
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* "Accessing PSTATE fields":
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* Writes to the PSTATE fields have side-effects on
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* various aspects of the PE operation. All of these
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* side-effects are guaranteed:
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* - Not to be visible to earlier instructions in
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* the execution stream.
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* - To be visible to later instructions in the
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* execution stream
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*
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* Also, writes to PMR are self-synchronizing, so no
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* interrupts with a lower priority than PMR is signaled
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* to the PE after the write.
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*
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* So we don't need additional synchronization here.
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*/
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gic_write_pmr(pmr);
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}
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write_sysreg(flags, daif);
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if (irq_disabled)
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trace_hardirqs_off();
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}
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/*
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* Called by synchronous exception handlers to restore the DAIF bits that were
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* modified by taking an exception.
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*/
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static inline void local_daif_inherit(struct pt_regs *regs)
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{
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unsigned long flags = regs->pstate & DAIF_MASK;
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/*
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* We can't use local_daif_restore(regs->pstate) here as
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* system_has_prio_mask_debugging() won't restore the I bit if it can
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* use the pmr instead.
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*/
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write_sysreg(flags, daif);
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}
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#endif
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