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c39263c33f
The prm_irqst_reg is not part of the VP. Move it up into the common voltage domain struct. Signed-off-by: Kevin Hilman <khilman@ti.com>
143 lines
5.3 KiB
C
143 lines
5.3 KiB
C
/*
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* OMAP3/4 Voltage Processor (VP) structure and macro definitions
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*
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* Copyright (C) 2007, 2010 Texas Instruments, Inc.
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* Rajendra Nayak <rnayak@ti.com>
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* Lesly A M <x0080970@ti.com>
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* Thara Gopinath <thara@ti.com>
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*
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* Copyright (C) 2008, 2011 Nokia Corporation
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* Kalle Jokiniemi
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
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* 2 as published by the Free Software Foundation.
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_VP_H
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#define __ARCH_ARM_MACH_OMAP2_VP_H
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#include <linux/kernel.h>
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/* XXX document */
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#define VP_IDLE_TIMEOUT 200
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#define VP_TRANXDONE_TIMEOUT 300
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/**
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* struct omap_vp_common_data - register data common to all VDDs
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* @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg
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* @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg
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* @vpconfig_timeouten_mask: TIMEOUT bitmask in the PRM_VP*_CONFIG reg
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* @vpconfig_initvdd: INITVDD bitmask in the PRM_VP*_CONFIG reg
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* @vpconfig_forceupdate: FORCEUPDATE bitmask in the PRM_VP*_CONFIG reg
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* @vpconfig_vpenable: VPENABLE bitmask in the PRM_VP*_CONFIG reg
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* @vpconfig_erroroffset_shift: ERROROFFSET field shift in PRM_VP*_CONFIG reg
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* @vpconfig_errorgain_shift: ERRORGAIN field shift in PRM_VP*_CONFIG reg
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* @vpconfig_initvoltage_shift: INITVOLTAGE field shift in PRM_VP*_CONFIG reg
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* @vpconfig_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg
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* @vpconfig_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg
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* @vpconfig_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg
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* @vpconfig_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg
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* @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg
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* @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg
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* @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg
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* @prm_mod: PRM module id used for PRM register access
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*
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* XXX It it not necessary to have both a mask and a shift for the same
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* bitfield - remove one
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* XXX Many of these fields are wrongly named -- e.g., vpconfig_smps* -- fix!
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*/
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struct omap_vp_common_data {
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u32 vpconfig_errorgain_mask;
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u32 vpconfig_initvoltage_mask;
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u32 vpconfig_timeouten;
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u32 vpconfig_initvdd;
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u32 vpconfig_forceupdate;
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u32 vpconfig_vpenable;
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s16 prm_mod;
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u8 vpconfig_erroroffset_shift;
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u8 vpconfig_errorgain_shift;
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u8 vpconfig_initvoltage_shift;
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u8 vstepmin_stepmin_shift;
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u8 vstepmin_smpswaittimemin_shift;
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u8 vstepmax_stepmax_shift;
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u8 vstepmax_smpswaittimemax_shift;
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u8 vlimitto_vddmin_shift;
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u8 vlimitto_vddmax_shift;
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u8 vlimitto_timeout_shift;
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};
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/**
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* struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data
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* @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
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*
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* XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a
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* hardware bug
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* XXX This structure is probably not needed
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*/
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struct omap_vp_prm_irqst_data {
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u32 tranxdone_status;
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};
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/**
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* struct omap_vp_instance_data - VP register offsets (per-VDD)
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* @vp_common: pointer to struct omap_vp_common_data * for this SoC
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* @prm_irqst_data: pointer to struct omap_vp_prm_irqst_data for this VDD
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* @vpconfig: PRM_VP*_CONFIG reg offset from PRM start
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* @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start
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* @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start
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* @vstatus: PRM_VP*_VSTATUS reg offset from PRM start
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* @voltage: PRM_VP*_VOLTAGE reg offset from PRM start
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*
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* XXX vp_common is probably not needed since it is per-SoC
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*/
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struct omap_vp_instance_data {
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const struct omap_vp_common_data *vp_common;
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const struct omap_vp_prm_irqst_data *prm_irqst_data;
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u8 vpconfig;
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u8 vstepmin;
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u8 vstepmax;
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u8 vlimitto;
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u8 vstatus;
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u8 voltage;
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};
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/**
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* struct omap_vp_runtime_data - VP data populated at runtime by code
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* @vpconfig_erroroffset: value of ERROROFFSET bitfield in PRM_VP*_CONFIG
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* @vpconfig_errorgain: value of ERRORGAIN bitfield in PRM_VP*_CONFIG
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* @vstepmin_smpswaittimemin: value of SMPSWAITTIMEMIN bitfield in PRM_VP*_VSTEPMIN
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* @vstepmax_smpswaittimemax: value of SMPSWAITTIMEMAX bitfield in PRM_VP*_VSTEPMAX
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* @vlimitto_timeout: value of TIMEOUT bitfield in PRM_VP*_VLIMITTO
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* @vstepmin_stepmin: value of VSTEPMIN bitfield in PRM_VP*_VSTEPMIN
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* @vstepmax_stepmax: value of VSTEPMAX bitfield in PRM_VP*_VSTEPMAX
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* @vlimitto_vddmin: value of VDDMIN bitfield in PRM_VP*_VLIMITTO
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* @vlimitto_vddmax: value of VDDMAX bitfield in PRM_VP*_VLIMITTO
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*
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* XXX Is this structure really needed? Why not just program the
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* device directly? They are in PRM space, therefore in the WKUP
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* powerdomain, so register contents should not be lost in off-mode.
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* XXX Some of these fields are incorrectly named, e.g., vstep*
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*/
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struct omap_vp_runtime_data {
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u32 vpconfig_erroroffset;
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u16 vpconfig_errorgain;
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u16 vstepmin_smpswaittimemin;
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u16 vstepmax_smpswaittimemax;
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u16 vlimitto_timeout;
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u8 vstepmin_stepmin;
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u8 vstepmax_stepmax;
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u8 vlimitto_vddmin;
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u8 vlimitto_vddmax;
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};
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extern struct omap_vp_instance_data omap3_vp1_data;
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extern struct omap_vp_instance_data omap3_vp2_data;
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extern struct omap_vp_instance_data omap4_vp_mpu_data;
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extern struct omap_vp_instance_data omap4_vp_iva_data;
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extern struct omap_vp_instance_data omap4_vp_core_data;
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#endif
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