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Add ZSC Control register programming sequence for ACP D0 and D3 state transitions for ACP7.0 onwards. This will allow ACP to enter low power state when ACP enters D3 state. When ACP enters D0 State, ZSC control should be disabled. Tested-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://patch.msgid.link/20240807085154.1987681-1-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown <broonie@kernel.org> |
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| .. | ||
| acp | ||
| include | ||
| ps | ||
| raven | ||
| renoir | ||
| rpl | ||
| vangogh | ||
| yc | ||
| acp3x-rt5682-max9836.c | ||
| acp-config.c | ||
| acp-da7219-max98357a.c | ||
| acp-es8336.c | ||
| acp-pcm-dma.c | ||
| acp-rt5645.c | ||
| acp.h | ||
| Kconfig | ||
| mach-config.h | ||
| Makefile | ||