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7155530d9e
This patch proposes to remove the use of the IRQF_DISABLED flag It's a NOOP since 2.6.35 and it will be removed one day. Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com> Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
161 lines
4.0 KiB
C
161 lines
4.0 KiB
C
/*
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* Copyright (C) 2004-2007 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/clockchips.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/time.h>
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#include <linux/cpu.h>
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#include <asm/sysreg.h>
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#include <mach/pm.h>
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static cycle_t read_cycle_count(struct clocksource *cs)
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{
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return (cycle_t)sysreg_read(COUNT);
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}
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/*
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* The architectural cycle count registers are a fine clocksource unless
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* the system idle loop use sleep states like "idle": the CPU cycles
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* measured by COUNT (and COMPARE) don't happen during sleep states.
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* Their duration also changes if cpufreq changes the CPU clock rate.
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* So we rate the clocksource using COUNT as very low quality.
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*/
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static struct clocksource counter = {
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.name = "avr32_counter",
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.rating = 50,
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.read = read_cycle_count,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static irqreturn_t timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evdev = dev_id;
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if (unlikely(!(intc_get_pending(0) & 1)))
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return IRQ_NONE;
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/*
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* Disable the interrupt until the clockevent subsystem
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* reprograms it.
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*/
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sysreg_write(COMPARE, 0);
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evdev->event_handler(evdev);
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return IRQ_HANDLED;
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}
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static struct irqaction timer_irqaction = {
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.handler = timer_interrupt,
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/* Oprofile uses the same irq as the timer, so allow it to be shared */
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.flags = IRQF_TIMER | IRQF_SHARED,
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.name = "avr32_comparator",
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};
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static int comparator_next_event(unsigned long delta,
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struct clock_event_device *evdev)
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{
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unsigned long flags;
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raw_local_irq_save(flags);
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/* The time to read COUNT then update COMPARE must be less
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* than the min_delta_ns value for this clockevent source.
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*/
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sysreg_write(COMPARE, (sysreg_read(COUNT) + delta) ? : 1);
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raw_local_irq_restore(flags);
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return 0;
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}
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static void comparator_mode(enum clock_event_mode mode,
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struct clock_event_device *evdev)
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{
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switch (mode) {
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case CLOCK_EVT_MODE_ONESHOT:
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pr_debug("%s: start\n", evdev->name);
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/* FALLTHROUGH */
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case CLOCK_EVT_MODE_RESUME:
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/*
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* If we're using the COUNT and COMPARE registers we
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* need to force idle poll.
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*/
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cpu_idle_poll_ctrl(true);
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break;
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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sysreg_write(COMPARE, 0);
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pr_debug("%s: stop\n", evdev->name);
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if (evdev->mode == CLOCK_EVT_MODE_ONESHOT ||
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evdev->mode == CLOCK_EVT_MODE_RESUME) {
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/*
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* Only disable idle poll if we have forced that
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* in a previous call.
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*/
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cpu_idle_poll_ctrl(false);
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}
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break;
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default:
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BUG();
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}
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}
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static struct clock_event_device comparator = {
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.name = "avr32_comparator",
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.features = CLOCK_EVT_FEAT_ONESHOT,
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.shift = 16,
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.rating = 50,
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.set_next_event = comparator_next_event,
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.set_mode = comparator_mode,
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};
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void read_persistent_clock(struct timespec *ts)
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{
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ts->tv_sec = mktime(2007, 1, 1, 0, 0, 0);
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ts->tv_nsec = 0;
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}
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void __init time_init(void)
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{
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unsigned long counter_hz;
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int ret;
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/* figure rate for counter */
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counter_hz = clk_get_rate(boot_cpu_data.clk);
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ret = clocksource_register_hz(&counter, counter_hz);
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if (ret)
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pr_debug("timer: could not register clocksource: %d\n", ret);
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/* setup COMPARE clockevent */
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comparator.mult = div_sc(counter_hz, NSEC_PER_SEC, comparator.shift);
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comparator.max_delta_ns = clockevent_delta2ns((u32)~0, &comparator);
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comparator.min_delta_ns = clockevent_delta2ns(50, &comparator) + 1;
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comparator.cpumask = cpumask_of(0);
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sysreg_write(COMPARE, 0);
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timer_irqaction.dev_id = &comparator;
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ret = setup_irq(0, &timer_irqaction);
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if (ret)
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pr_debug("timer: could not request IRQ 0: %d\n", ret);
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else {
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clockevents_register_device(&comparator);
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pr_info("%s: irq 0, %lu.%03lu MHz\n", comparator.name,
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((counter_hz + 500) / 1000) / 1000,
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((counter_hz + 500) / 1000) % 1000);
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}
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}
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