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dfd5e50ea4
Not used any more. Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
425 lines
13 KiB
C
425 lines
13 KiB
C
/*
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* Copyright (C) 2015 Red Hat, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef VIRTIO_DRV_H
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#define VIRTIO_DRV_H
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#include <linux/virtio.h>
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#include <linux/virtio_ids.h>
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#include <linux/virtio_config.h>
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#include <linux/virtio_gpu.h>
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#include <drm/drmP.h>
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#include <drm/drm_gem.h>
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#include <drm/drm_crtc_helper.h>
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#include <ttm/ttm_bo_api.h>
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#include <ttm/ttm_bo_driver.h>
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#include <ttm/ttm_placement.h>
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#include <ttm/ttm_module.h>
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#define DRIVER_NAME "virtio_gpu"
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#define DRIVER_DESC "virtio GPU"
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#define DRIVER_DATE "0"
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#define DRIVER_MAJOR 0
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#define DRIVER_MINOR 0
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#define DRIVER_PATCHLEVEL 1
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/* virtgpu_drm_bus.c */
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int drm_virtio_set_busid(struct drm_device *dev, struct drm_master *master);
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int drm_virtio_init(struct drm_driver *driver, struct virtio_device *vdev);
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struct virtio_gpu_object {
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struct drm_gem_object gem_base;
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uint32_t hw_res_handle;
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struct sg_table *pages;
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void *vmap;
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bool dumb;
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struct ttm_place placement_code;
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struct ttm_placement placement;
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struct ttm_buffer_object tbo;
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struct ttm_bo_kmap_obj kmap;
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};
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#define gem_to_virtio_gpu_obj(gobj) \
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container_of((gobj), struct virtio_gpu_object, gem_base)
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struct virtio_gpu_vbuffer;
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struct virtio_gpu_device;
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typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_vbuffer *vbuf);
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struct virtio_gpu_fence_driver {
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atomic64_t last_seq;
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uint64_t sync_seq;
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struct list_head fences;
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spinlock_t lock;
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};
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struct virtio_gpu_fence {
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struct fence f;
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struct virtio_gpu_fence_driver *drv;
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struct list_head node;
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uint64_t seq;
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};
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#define to_virtio_fence(x) \
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container_of(x, struct virtio_gpu_fence, f)
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struct virtio_gpu_vbuffer {
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char *buf;
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int size;
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void *data_buf;
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uint32_t data_size;
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char *resp_buf;
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int resp_size;
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virtio_gpu_resp_cb resp_cb;
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struct list_head list;
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};
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struct virtio_gpu_output {
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int index;
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struct drm_crtc crtc;
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struct drm_connector conn;
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struct drm_encoder enc;
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struct virtio_gpu_display_one info;
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struct virtio_gpu_update_cursor cursor;
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int cur_x;
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int cur_y;
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};
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#define drm_crtc_to_virtio_gpu_output(x) \
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container_of(x, struct virtio_gpu_output, crtc)
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#define drm_connector_to_virtio_gpu_output(x) \
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container_of(x, struct virtio_gpu_output, conn)
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#define drm_encoder_to_virtio_gpu_output(x) \
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container_of(x, struct virtio_gpu_output, enc)
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struct virtio_gpu_framebuffer {
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struct drm_framebuffer base;
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struct drm_gem_object *obj;
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int x1, y1, x2, y2; /* dirty rect */
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spinlock_t dirty_lock;
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uint32_t hw_res_handle;
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};
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#define to_virtio_gpu_framebuffer(x) \
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container_of(x, struct virtio_gpu_framebuffer, base)
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struct virtio_gpu_mman {
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struct ttm_bo_global_ref bo_global_ref;
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struct drm_global_reference mem_global_ref;
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bool mem_global_referenced;
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struct ttm_bo_device bdev;
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};
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struct virtio_gpu_fbdev;
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struct virtio_gpu_queue {
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struct virtqueue *vq;
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spinlock_t qlock;
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wait_queue_head_t ack_queue;
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struct work_struct dequeue_work;
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};
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struct virtio_gpu_drv_capset {
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uint32_t id;
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uint32_t max_version;
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uint32_t max_size;
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};
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struct virtio_gpu_drv_cap_cache {
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struct list_head head;
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void *caps_cache;
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uint32_t id;
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uint32_t version;
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uint32_t size;
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atomic_t is_valid;
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};
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struct virtio_gpu_device {
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struct device *dev;
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struct drm_device *ddev;
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struct virtio_device *vdev;
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struct virtio_gpu_mman mman;
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/* pointer to fbdev info structure */
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struct virtio_gpu_fbdev *vgfbdev;
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struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
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uint32_t num_scanouts;
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struct virtio_gpu_queue ctrlq;
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struct virtio_gpu_queue cursorq;
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struct list_head free_vbufs;
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spinlock_t free_vbufs_lock;
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void *vbufs;
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bool vqs_ready;
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struct idr resource_idr;
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spinlock_t resource_idr_lock;
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wait_queue_head_t resp_wq;
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/* current display info */
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spinlock_t display_info_lock;
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bool display_info_pending;
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struct virtio_gpu_fence_driver fence_drv;
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struct idr ctx_id_idr;
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spinlock_t ctx_id_idr_lock;
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bool has_virgl_3d;
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struct work_struct config_changed_work;
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struct virtio_gpu_drv_capset *capsets;
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uint32_t num_capsets;
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struct list_head cap_cache;
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};
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struct virtio_gpu_fpriv {
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uint32_t ctx_id;
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};
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/* virtio_ioctl.c */
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#define DRM_VIRTIO_NUM_IOCTLS 10
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extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
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/* virtio_kms.c */
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int virtio_gpu_driver_load(struct drm_device *dev, unsigned long flags);
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int virtio_gpu_driver_unload(struct drm_device *dev);
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int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
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void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
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/* virtio_gem.c */
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void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj);
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int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev);
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void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev);
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int virtio_gpu_gem_create(struct drm_file *file,
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struct drm_device *dev,
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uint64_t size,
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struct drm_gem_object **obj_p,
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uint32_t *handle_p);
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int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
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struct drm_file *file);
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void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
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struct drm_file *file);
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struct virtio_gpu_object *virtio_gpu_alloc_object(struct drm_device *dev,
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size_t size, bool kernel,
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bool pinned);
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int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
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struct drm_device *dev,
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struct drm_mode_create_dumb *args);
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int virtio_gpu_mode_dumb_destroy(struct drm_file *file_priv,
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struct drm_device *dev,
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uint32_t handle);
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int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
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struct drm_device *dev,
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uint32_t handle, uint64_t *offset_p);
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/* virtio_fb */
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#define VIRTIO_GPUFB_CONN_LIMIT 1
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int virtio_gpu_fbdev_init(struct virtio_gpu_device *vgdev);
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void virtio_gpu_fbdev_fini(struct virtio_gpu_device *vgdev);
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int virtio_gpu_surface_dirty(struct virtio_gpu_framebuffer *qfb,
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struct drm_clip_rect *clips,
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unsigned num_clips);
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/* virtio vg */
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int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
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void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
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void virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev,
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uint32_t *resid);
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void virtio_gpu_resource_id_put(struct virtio_gpu_device *vgdev, uint32_t id);
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void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
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uint32_t resource_id,
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uint32_t format,
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uint32_t width,
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uint32_t height);
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void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
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uint32_t resource_id);
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void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
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uint32_t resource_id, uint64_t offset,
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__le32 width, __le32 height,
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__le32 x, __le32 y,
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struct virtio_gpu_fence **fence);
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void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
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uint32_t resource_id,
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uint32_t x, uint32_t y,
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uint32_t width, uint32_t height);
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void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
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uint32_t scanout_id, uint32_t resource_id,
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uint32_t width, uint32_t height,
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uint32_t x, uint32_t y);
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int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_object *obj,
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uint32_t resource_id,
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struct virtio_gpu_fence **fence);
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int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
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int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
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void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_output *output);
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int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
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void virtio_gpu_cmd_resource_inval_backing(struct virtio_gpu_device *vgdev,
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uint32_t resource_id);
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int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
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int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
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int idx, int version,
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struct virtio_gpu_drv_cap_cache **cache_p);
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void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
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uint32_t nlen, const char *name);
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void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
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uint32_t id);
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void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
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uint32_t ctx_id,
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uint32_t resource_id);
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void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
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uint32_t ctx_id,
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uint32_t resource_id);
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void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
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void *data, uint32_t data_size,
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uint32_t ctx_id, struct virtio_gpu_fence **fence);
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void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
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uint32_t resource_id, uint32_t ctx_id,
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uint64_t offset, uint32_t level,
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struct virtio_gpu_box *box,
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struct virtio_gpu_fence **fence);
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void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
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uint32_t resource_id, uint32_t ctx_id,
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uint64_t offset, uint32_t level,
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struct virtio_gpu_box *box,
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struct virtio_gpu_fence **fence);
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void
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virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_resource_create_3d *rc_3d,
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struct virtio_gpu_fence **fence);
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void virtio_gpu_ctrl_ack(struct virtqueue *vq);
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void virtio_gpu_cursor_ack(struct virtqueue *vq);
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void virtio_gpu_fence_ack(struct virtqueue *vq);
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void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
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void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
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void virtio_gpu_dequeue_fence_func(struct work_struct *work);
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/* virtio_gpu_display.c */
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int virtio_gpu_framebuffer_init(struct drm_device *dev,
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struct virtio_gpu_framebuffer *vgfb,
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const struct drm_mode_fb_cmd2 *mode_cmd,
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struct drm_gem_object *obj);
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int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
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void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
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/* virtio_gpu_plane.c */
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struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
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int index);
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/* virtio_gpu_ttm.c */
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int virtio_gpu_ttm_init(struct virtio_gpu_device *vgdev);
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void virtio_gpu_ttm_fini(struct virtio_gpu_device *vgdev);
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int virtio_gpu_mmap(struct file *filp, struct vm_area_struct *vma);
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/* virtio_gpu_fence.c */
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int virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_ctrl_hdr *cmd_hdr,
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struct virtio_gpu_fence **fence);
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void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
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u64 last_seq);
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/* virtio_gpu_object */
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int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
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unsigned long size, bool kernel, bool pinned,
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struct virtio_gpu_object **bo_ptr);
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int virtio_gpu_object_kmap(struct virtio_gpu_object *bo, void **ptr);
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int virtio_gpu_object_get_sg_table(struct virtio_gpu_device *qdev,
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struct virtio_gpu_object *bo);
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void virtio_gpu_object_free_sg_table(struct virtio_gpu_object *bo);
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int virtio_gpu_object_wait(struct virtio_gpu_object *bo, bool no_wait);
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/* virtgpu_prime.c */
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int virtgpu_gem_prime_pin(struct drm_gem_object *obj);
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void virtgpu_gem_prime_unpin(struct drm_gem_object *obj);
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struct sg_table *virtgpu_gem_prime_get_sg_table(struct drm_gem_object *obj);
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struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
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struct drm_device *dev, struct dma_buf_attachment *attach,
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struct sg_table *sgt);
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void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj);
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void virtgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
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int virtgpu_gem_prime_mmap(struct drm_gem_object *obj,
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struct vm_area_struct *vma);
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static inline struct virtio_gpu_object*
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virtio_gpu_object_ref(struct virtio_gpu_object *bo)
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{
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ttm_bo_reference(&bo->tbo);
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return bo;
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}
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static inline void virtio_gpu_object_unref(struct virtio_gpu_object **bo)
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{
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struct ttm_buffer_object *tbo;
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if ((*bo) == NULL)
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return;
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tbo = &((*bo)->tbo);
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ttm_bo_unref(&tbo);
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if (tbo == NULL)
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*bo = NULL;
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}
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static inline u64 virtio_gpu_object_mmap_offset(struct virtio_gpu_object *bo)
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{
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return drm_vma_node_offset_addr(&bo->tbo.vma_node);
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}
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static inline int virtio_gpu_object_reserve(struct virtio_gpu_object *bo,
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bool no_wait)
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{
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int r;
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r = ttm_bo_reserve(&bo->tbo, true, no_wait, NULL);
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if (unlikely(r != 0)) {
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if (r != -ERESTARTSYS) {
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struct virtio_gpu_device *qdev =
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bo->gem_base.dev->dev_private;
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dev_err(qdev->dev, "%p reserve failed\n", bo);
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}
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return r;
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}
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return 0;
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}
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static inline void virtio_gpu_object_unreserve(struct virtio_gpu_object *bo)
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{
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ttm_bo_unreserve(&bo->tbo);
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}
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/* virgl debufs */
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int virtio_gpu_debugfs_init(struct drm_minor *minor);
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void virtio_gpu_debugfs_takedown(struct drm_minor *minor);
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#endif
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