Catalin Marinas 35a8697692 arm64: Update the TCR_EL1 translation granule definitions for 16K pages ... The current TCR register setting in arch/arm64/mm/proc.S assumes that TCR_EL1.TG* fields are one bit wide and bit 31 is RES1 (reserved, set to 1). With the addition of 16K pages (currently unsupported in the kernel), the TCR_EL1.TG* fields have been extended to two bits. This patch updates the corresponding Linux definitions and drops the bit 31 setting in proc.S in favour of the new macros. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Joe Sylve <joe.sylve@gmail.com>		2014-04-03 10:43:11 +01:00
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asm	arm64: Update the TCR_EL1 translation granule definitions for 16K pages	2014-04-03 10:43:11 +01:00
uapi/asm	ARM64: perf: add support for perf registers API	2014-03-13 11:22:37 +00:00