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c80efbae6a
Whistler is a highly configurable Tegra evaluation and development board. This change adds support for the following specific configuration: E1120 motherboard E1108 CPU board E1116 PMU board The motherboard configuration switches are set as follows: SW1=0 SW2=0 SW3=5 S1/S2/S3/S4 all on, except S3 7/8 are off. Other combinations of daugher boards may work to varying degrees, but will likely require some SW adjustment. Signed-off-by: Stephen Warren <swarren@nvidia.com>
302 lines
6.1 KiB
Plaintext
302 lines
6.1 KiB
Plaintext
/dts-v1/;
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/include/ "tegra20.dtsi"
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/ {
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model = "NVIDIA Tegra2 Whistler evaluation board";
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compatible = "nvidia,whistler", "nvidia,tegra20";
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memory {
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reg = <0x00000000 0x20000000>;
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};
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pinmux {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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ata {
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nvidia,pins = "ata", "atb", "ate", "gma", "gmb",
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"gmc", "gmd", "gpu";
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nvidia,function = "gmi";
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};
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atc {
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nvidia,pins = "atc", "atd";
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nvidia,function = "sdio4";
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};
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cdev1 {
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nvidia,pins = "cdev1";
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nvidia,function = "plla_out";
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};
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cdev2 {
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nvidia,pins = "cdev2";
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nvidia,function = "osc";
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};
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crtp {
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nvidia,pins = "crtp";
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nvidia,function = "crt";
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};
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csus {
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nvidia,pins = "csus";
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nvidia,function = "vi_sensor_clk";
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};
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dap1 {
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nvidia,pins = "dap1";
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nvidia,function = "dap1";
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};
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dap2 {
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nvidia,pins = "dap2";
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nvidia,function = "dap2";
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};
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dap3 {
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nvidia,pins = "dap3";
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nvidia,function = "dap3";
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};
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dap4 {
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nvidia,pins = "dap4";
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nvidia,function = "dap4";
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};
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ddc {
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nvidia,pins = "ddc";
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nvidia,function = "i2c2";
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};
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dta {
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nvidia,pins = "dta", "dtb", "dtc", "dtd";
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nvidia,function = "vi";
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};
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dte {
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nvidia,pins = "dte";
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nvidia,function = "rsvd1";
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};
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dtf {
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nvidia,pins = "dtf";
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nvidia,function = "i2c3";
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};
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gme {
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nvidia,pins = "gme";
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nvidia,function = "dap5";
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};
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gpu7 {
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nvidia,pins = "gpu7";
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nvidia,function = "rtck";
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};
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gpv {
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nvidia,pins = "gpv";
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nvidia,function = "pcie";
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};
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hdint {
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nvidia,pins = "hdint", "pta";
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nvidia,function = "hdmi";
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};
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i2cp {
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nvidia,pins = "i2cp";
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nvidia,function = "i2cp";
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};
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irrx {
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nvidia,pins = "irrx", "irtx";
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nvidia,function = "uartb";
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};
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kbca {
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nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
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nvidia,function = "kbc";
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};
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kbcb {
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nvidia,pins = "kbcb", "kbcd";
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nvidia,function = "sdio2";
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};
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lcsn {
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nvidia,pins = "lcsn", "lsck", "lsda", "lsdi",
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"spia", "spib", "spic";
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nvidia,function = "spi3";
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};
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ld0 {
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nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
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"ld5", "ld6", "ld7", "ld8", "ld9",
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"ld10", "ld11", "ld12", "ld13", "ld14",
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"ld15", "ld16", "ld17", "ldc", "ldi",
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"lhp0", "lhp1", "lhp2", "lhs", "lm0",
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"lm1", "lpp", "lpw0", "lpw1", "lpw2",
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"lsc0", "lsc1", "lspi", "lvp0", "lvp1",
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"lvs";
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nvidia,function = "displaya";
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};
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owc {
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nvidia,pins = "owc", "uac";
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nvidia,function = "owr";
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};
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pmc {
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nvidia,pins = "pmc";
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nvidia,function = "pwr_on";
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};
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rm {
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nvidia,pins = "rm";
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nvidia,function = "i2c1";
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};
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sdb {
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nvidia,pins = "sdb", "sdc", "sdd", "slxa",
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"slxc", "slxd", "slxk";
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nvidia,function = "sdio3";
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};
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sdio1 {
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nvidia,pins = "sdio1";
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nvidia,function = "sdio1";
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};
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spdi {
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nvidia,pins = "spdi", "spdo";
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nvidia,function = "rsvd2";
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};
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spid {
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nvidia,pins = "spid", "spie", "spig", "spih";
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nvidia,function = "spi2_alt";
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};
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spif {
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nvidia,pins = "spif";
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nvidia,function = "spi2";
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};
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uaa {
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nvidia,pins = "uaa", "uab";
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nvidia,function = "uarta";
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};
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uad {
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nvidia,pins = "uad";
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nvidia,function = "irda";
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};
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uca {
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nvidia,pins = "uca", "ucb";
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nvidia,function = "uartc";
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};
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uda {
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nvidia,pins = "uda";
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nvidia,function = "spi1";
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};
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conf_ata {
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nvidia,pins = "ata", "atb", "atc", "ddc", "gma",
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"gmb", "gmc", "gmd", "irrx", "irtx",
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"kbca", "kbcb", "kbcc", "kbcd", "kbce",
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"kbcf", "sdc", "sdd", "spie", "spig",
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"spih", "uaa", "uab", "uad", "uca",
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"ucb";
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nvidia,pull = <2>;
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nvidia,tristate = <0>;
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};
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conf_atd {
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nvidia,pins = "atd", "ate", "cdev1", "csus",
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"dap1", "dap2", "dap3", "dap4", "dte",
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"dtf", "gpu", "gpu7", "gpv", "i2cp",
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"rm", "sdio1", "slxa", "slxc", "slxd",
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"slxk", "spdi", "spdo", "uac", "uda";
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nvidia,pull = <0>;
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nvidia,tristate = <0>;
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};
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conf_cdev2 {
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nvidia,pins = "cdev2", "spia", "spib";
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nvidia,pull = <1>;
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nvidia,tristate = <1>;
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};
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conf_ck32 {
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nvidia,pins = "ck32", "ddrc", "lc", "pmca",
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"pmcb", "pmcc", "pmcd", "xm2c",
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"xm2d";
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nvidia,pull = <0>;
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};
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conf_crtp {
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nvidia,pins = "crtp";
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nvidia,pull = <0>;
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nvidia,tristate = <1>;
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};
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conf_dta {
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nvidia,pins = "dta", "dtb", "dtc", "dtd",
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"spid", "spif";
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nvidia,pull = <1>;
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nvidia,tristate = <0>;
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};
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conf_gme {
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nvidia,pins = "gme", "owc", "pta", "spic";
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nvidia,pull = <2>;
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nvidia,tristate = <1>;
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};
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conf_ld17_0 {
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nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
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"ld23_22";
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nvidia,pull = <1>;
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};
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conf_ls {
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nvidia,pins = "ls", "pmce";
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nvidia,pull = <2>;
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};
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drive_dap1 {
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nvidia,pins = "drive_dap1";
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nvidia,high-speed-mode = <0>;
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nvidia,schmitt = <1>;
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nvidia,low-power-mode = <0>;
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nvidia,pull-down-strength = <0>;
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nvidia,pull-up-strength = <0>;
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nvidia,slew-rate-rising = <0>;
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nvidia,slew-rate-falling = <0>;
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};
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};
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};
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i2s@70002800 {
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status = "okay";
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};
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serial@70006000 {
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status = "okay";
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clock-frequency = <216000000>;
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};
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i2c@7000d000 {
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status = "okay";
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clock-frequency = <100000>;
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codec: codec@1a {
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compatible = "wlf,wm8753";
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reg = <0x1a>;
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};
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tca6416: gpio@20 {
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compatible = "ti,tca6416";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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usb@c5000000 {
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status = "okay";
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nvidia,vbus-gpio = <&tca6416 0 0>; /* GPIO_PMU0 */
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};
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usb@c5008000 {
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status = "okay";
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nvidia,vbus-gpio = <&tca6416 1 0>; /* GPIO_PMU1 */
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};
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sdhci@c8000400 {
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status = "okay";
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wp-gpios = <&gpio 173 0>; /* gpio PV5 */
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bus-width = <8>;
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};
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sdhci@c8000600 {
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status = "okay";
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bus-width = <8>;
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};
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sound {
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compatible = "nvidia,tegra-audio-wm8753-whistler",
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"nvidia,tegra-audio-wm8753";
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nvidia,model = "NVIDIA Tegra Whistler";
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nvidia,audio-routing =
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"Headphone Jack", "LOUT1",
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"Headphone Jack", "ROUT1",
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"MIC2", "Mic Jack",
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"MIC2N", "Mic Jack";
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nvidia,i2s-controller = <&tegra_i2s1>;
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nvidia,audio-codec = <&codec>;
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};
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};
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