Drew Fustini c101b4a028 riscv: dts: thead: change TH1520 uart nodes to use clock controller ... Change the clock property in TH1520 uart nodes to a clock provided by AP_SUBSYS clock controller. Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>		2024-08-08 09:19:45 -07:00
..
boot	riscv: dts: thead: change TH1520 uart nodes to use clock controller	2024-08-08 09:19:45 -07:00
configs	RISC-V: run savedefconfig for defconfig	2024-07-22 10:57:47 -07:00
crypto	crypto: riscv - add vector crypto accelerated AES-CBC-CTS	2024-03-20 08:56:11 -07:00
errata	riscv: Extend cpufeature.c to detect vendor extensions	2024-07-22 15:36:54 -07:00
include	RISC-V Patches for the 6.11 Merge Window, Part 2	2024-07-27 10:14:34 -07:00
kernel	RISC-V: Provide the frequency of time CSR via hwprobe	2024-07-26 05:50:51 -07:00
kvm	ARM:	2024-07-20 12:41:03 -07:00
lib	riscv: Optimize crc32 with Zbc extension	2024-07-10 13:19:50 -07:00
mm	- 875fa64577 ("mm/hugetlb_vmemmap: fix race with speculative PFN	2024-07-21 17:15:46 -07:00
net	RISC-V Patches for the 6.11 Merge Window, Part 1	2024-07-20 09:11:27 -07:00
purgatory	Makefile: remove redundant tool coverage variables	2024-05-14 23:35:48 +09:00
tools	riscv: Check relocations at compile time	2023-04-19 07:46:32 -07:00
Kbuild	RISC-V: hook new crypto subdir into build-system	2024-01-22 17:55:17 -08:00
Kconfig	RISC-V Patches for the 6.11 Merge Window, Part 2	2024-07-27 10:14:34 -07:00
Kconfig.debug	riscv: Add tests for riscv module loading	2023-11-07 14:59:32 -08:00
Kconfig.errata	riscv: thead: Rename T-Head PBMT to MAE	2024-04-25 10:22:33 -07:00
Kconfig.socs	RISC-V: drop SOC_VIRT for ARCH_VIRT	2024-04-10 11:37:50 +01:00
Kconfig.vendor	riscv: Extend cpufeature.c to detect vendor extensions	2024-07-22 15:36:54 -07:00
Makefile	Merge patch series "riscv: Apply Zawrs when available"	2024-07-12 08:55:29 -07:00
Makefile.postlink	kbuild: remove ARCH_POSTLINK from module builds	2023-10-28 21:10:08 +09:00