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c03bb448f0
i.MX6 defines OCOTP_CTRLn:ADDR as seven bit address-field with a one bit RSVD0 field, i.MX7 defines OCOTP_CTRLn:ADDR as a four bit address-field with a four bit RSVD0 field. i.MX8 defines the OCOTP_CTRLn:ADDR bit-field as a full range eight bits. i.MX6 and i.MX7 should return zero for their respective RSVD0 bits and ignore a write-back of zero where i.MX8 will make use of the full range. This patch expands the bit-field definition for all users to eight bits, which is safe due to RSVD0 being a no-op for the i.MX6 and i.MX7. Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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| .. | ||
| bcm-ocotp.c | ||
| core.c | ||
| imx-iim.c | ||
| imx-ocotp-scu.c | ||
| imx-ocotp.c | ||
| Kconfig | ||
| lpc18xx_eeprom.c | ||
| lpc18xx_otp.c | ||
| Makefile | ||
| meson-efuse.c | ||
| meson-mx-efuse.c | ||
| mtk-efuse.c | ||
| mxs-ocotp.c | ||
| nvmem-sysfs.c | ||
| nvmem.h | ||
| qfprom.c | ||
| rave-sp-eeprom.c | ||
| rockchip-efuse.c | ||
| sc27xx-efuse.c | ||
| snvs_lpgpr.c | ||
| stm32-romem.c | ||
| sunxi_sid.c | ||
| uniphier-efuse.c | ||
| vf610-ocotp.c | ||
| zynqmp_nvmem.c | ||