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7d034c5c61
i.MX6ULL has different operating ranges than i.MX6UL so add the
operating points for the i.MX6ULL and remove them from board device
trees. A 25mV offset is added to the minimum allowed values like for the
i.MX6UL.
The valid frequencies are now selected by the cpufreq driver according
to ratings stored in fuses since commit 0aa9abd4c2 ("cpufreq: imx6q:
check speed grades for i.MX6ULL")
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
52 lines
1.0 KiB
Plaintext
52 lines
1.0 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright 2018 Toradex AG
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*/
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#include "imx6ull-colibri.dtsi"
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/ {
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memory@80000000 {
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reg = <0x80000000 0x20000000>;
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};
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wifi_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_snvs_wifi_pdn>;
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reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
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};
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};
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&cpu0 {
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clock-frequency = <792000000>;
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3
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&pinctrl_gpio4 &pinctrl_gpio5>;
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};
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&iomuxc_snvs {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_snvs_gpio1 &pinctrl_snvs_gpio2>;
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>;
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assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
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assigned-clock-rates = <0>, <198000000>;
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cap-power-off-card;
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keep-power-in-suspend;
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mmc-pwrseq = <&wifi_pwrseq>;
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no-1-8-v;
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non-removable;
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vmmc-supply = <®_module_3v3>;
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wakeup-source;
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status = "okay";
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};
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