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mediatek can support baud rate up to 4M. the 'uart_get_baud_rate' function will limit the max baud rate. Modify max baud to remove the limit. Signed-off-by: Long Cheng <long.cheng@mediatek.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
318 lines
8.0 KiB
C
318 lines
8.0 KiB
C
/*
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* Mediatek 8250 driver.
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*
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* Copyright (c) 2014 MundoReader S.L.
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* Author: Matthias Brugger <matthias.bgg@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/serial_8250.h>
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#include <linux/serial_reg.h>
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#include "8250.h"
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#define UART_MTK_HIGHS 0x09 /* Highspeed register */
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#define UART_MTK_SAMPLE_COUNT 0x0a /* Sample count register */
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#define UART_MTK_SAMPLE_POINT 0x0b /* Sample point register */
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#define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */
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struct mtk8250_data {
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int line;
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struct clk *uart_clk;
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struct clk *bus_clk;
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};
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static void
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mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
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struct ktermios *old)
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{
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struct uart_8250_port *up = up_to_u8250p(port);
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unsigned long flags;
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unsigned int baud, quot;
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serial8250_do_set_termios(port, termios, old);
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/*
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* Mediatek UARTs use an extra highspeed register (UART_MTK_HIGHS)
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*
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* We need to recalcualte the quot register, as the claculation depends
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* on the vaule in the highspeed register.
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*
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* Some baudrates are not supported by the chip, so we use the next
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* lower rate supported and update termios c_flag.
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*
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* If highspeed register is set to 3, we need to specify sample count
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* and sample point to increase accuracy. If not, we reset the
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* registers to their default values.
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*/
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baud = uart_get_baud_rate(port, termios, old,
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port->uartclk / 16 / 0xffff,
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port->uartclk);
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if (baud <= 115200) {
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serial_port_out(port, UART_MTK_HIGHS, 0x0);
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quot = uart_get_divisor(port, baud);
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} else if (baud <= 576000) {
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serial_port_out(port, UART_MTK_HIGHS, 0x2);
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/* Set to next lower baudrate supported */
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if ((baud == 500000) || (baud == 576000))
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baud = 460800;
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quot = DIV_ROUND_UP(port->uartclk, 4 * baud);
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} else {
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serial_port_out(port, UART_MTK_HIGHS, 0x3);
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quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
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}
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/*
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* Ok, we're now changing the port state. Do it with
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* interrupts disabled.
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*/
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spin_lock_irqsave(&port->lock, flags);
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/* set DLAB we have cval saved in up->lcr from the call to the core */
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serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
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serial_dl_write(up, quot);
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/* reset DLAB */
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serial_port_out(port, UART_LCR, up->lcr);
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if (baud > 460800) {
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unsigned int tmp;
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tmp = DIV_ROUND_CLOSEST(port->uartclk, quot * baud);
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serial_port_out(port, UART_MTK_SAMPLE_COUNT, tmp - 1);
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serial_port_out(port, UART_MTK_SAMPLE_POINT,
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(tmp - 2) >> 1);
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} else {
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serial_port_out(port, UART_MTK_SAMPLE_COUNT, 0x00);
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serial_port_out(port, UART_MTK_SAMPLE_POINT, 0xff);
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}
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spin_unlock_irqrestore(&port->lock, flags);
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/* Don't rewrite B0 */
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if (tty_termios_baud_rate(termios))
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tty_termios_encode_baud_rate(termios, baud, baud);
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}
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static int __maybe_unused mtk8250_runtime_suspend(struct device *dev)
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{
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struct mtk8250_data *data = dev_get_drvdata(dev);
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clk_disable_unprepare(data->uart_clk);
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clk_disable_unprepare(data->bus_clk);
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return 0;
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}
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static int __maybe_unused mtk8250_runtime_resume(struct device *dev)
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{
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struct mtk8250_data *data = dev_get_drvdata(dev);
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int err;
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err = clk_prepare_enable(data->uart_clk);
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if (err) {
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dev_warn(dev, "Can't enable clock\n");
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return err;
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}
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err = clk_prepare_enable(data->bus_clk);
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if (err) {
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dev_warn(dev, "Can't enable bus clock\n");
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return err;
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}
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return 0;
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}
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static void
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mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
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{
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if (!state)
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pm_runtime_get_sync(port->dev);
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serial8250_do_pm(port, state, old);
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if (state)
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pm_runtime_put_sync_suspend(port->dev);
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}
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static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p,
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struct mtk8250_data *data)
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{
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data->uart_clk = devm_clk_get(&pdev->dev, "baud");
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if (IS_ERR(data->uart_clk)) {
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/*
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* For compatibility with older device trees try unnamed
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* clk when no baud clk can be found.
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*/
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data->uart_clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(data->uart_clk)) {
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dev_warn(&pdev->dev, "Can't get uart clock\n");
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return PTR_ERR(data->uart_clk);
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}
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return 0;
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}
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data->bus_clk = devm_clk_get(&pdev->dev, "bus");
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if (IS_ERR(data->bus_clk))
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return PTR_ERR(data->bus_clk);
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return 0;
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}
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static int mtk8250_probe(struct platform_device *pdev)
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{
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struct uart_8250_port uart = {};
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struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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struct mtk8250_data *data;
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int err;
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if (!regs || !irq) {
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dev_err(&pdev->dev, "no registers/irq defined\n");
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return -EINVAL;
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}
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uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
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resource_size(regs));
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if (!uart.port.membase)
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return -ENOMEM;
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data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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if (pdev->dev.of_node) {
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err = mtk8250_probe_of(pdev, &uart.port, data);
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if (err)
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return err;
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} else
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return -ENODEV;
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spin_lock_init(&uart.port.lock);
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uart.port.mapbase = regs->start;
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uart.port.irq = irq->start;
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uart.port.pm = mtk8250_do_pm;
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uart.port.type = PORT_16550;
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uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
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uart.port.dev = &pdev->dev;
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uart.port.iotype = UPIO_MEM32;
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uart.port.regshift = 2;
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uart.port.private_data = data;
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uart.port.set_termios = mtk8250_set_termios;
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uart.port.uartclk = clk_get_rate(data->uart_clk);
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/* Disable Rate Fix function */
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writel(0x0, uart.port.membase +
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(MTK_UART_RATE_FIX << uart.port.regshift));
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platform_set_drvdata(pdev, data);
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pm_runtime_enable(&pdev->dev);
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if (!pm_runtime_enabled(&pdev->dev)) {
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err = mtk8250_runtime_resume(&pdev->dev);
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if (err)
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return err;
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}
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data->line = serial8250_register_8250_port(&uart);
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if (data->line < 0)
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return data->line;
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return 0;
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}
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static int mtk8250_remove(struct platform_device *pdev)
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{
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struct mtk8250_data *data = platform_get_drvdata(pdev);
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pm_runtime_get_sync(&pdev->dev);
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serial8250_unregister_port(data->line);
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pm_runtime_disable(&pdev->dev);
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pm_runtime_put_noidle(&pdev->dev);
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if (!pm_runtime_status_suspended(&pdev->dev))
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mtk8250_runtime_suspend(&pdev->dev);
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return 0;
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}
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static int __maybe_unused mtk8250_suspend(struct device *dev)
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{
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struct mtk8250_data *data = dev_get_drvdata(dev);
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serial8250_suspend_port(data->line);
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return 0;
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}
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static int __maybe_unused mtk8250_resume(struct device *dev)
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{
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struct mtk8250_data *data = dev_get_drvdata(dev);
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serial8250_resume_port(data->line);
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return 0;
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}
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static const struct dev_pm_ops mtk8250_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume)
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SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume,
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NULL)
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};
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static const struct of_device_id mtk8250_of_match[] = {
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{ .compatible = "mediatek,mt6577-uart" },
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{ /* Sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, mtk8250_of_match);
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static struct platform_driver mtk8250_platform_driver = {
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.driver = {
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.name = "mt6577-uart",
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.pm = &mtk8250_pm_ops,
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.of_match_table = mtk8250_of_match,
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},
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.probe = mtk8250_probe,
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.remove = mtk8250_remove,
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};
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module_platform_driver(mtk8250_platform_driver);
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#ifdef CONFIG_SERIAL_8250_CONSOLE
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static int __init early_mtk8250_setup(struct earlycon_device *device,
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const char *options)
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{
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if (!device->port.membase)
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return -ENODEV;
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device->port.iotype = UPIO_MEM32;
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return early_serial8250_setup(device, NULL);
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}
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OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup);
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#endif
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MODULE_AUTHOR("Matthias Brugger");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("Mediatek 8250 serial port driver");
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