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All RISC-V platforms today lack an IOMMU. However, legacy PCI devices sometimes require DMA-memory to be in the low 32 bits. To make this work, we enable the software-based bounce buffers from swiotlb. They only impose overhead when the device in question cannot address the full 64-bit address space, so a perfect fit. This patch assumes that DMA is coherent with the processor and the PCI bus. It also assumes that the processor and devices share a common address space. This is true for all RISC-V platforms so far. [changelog stolen from an earlier patch by Palmer Dabbelt that did the more complicated swiotlb wireup before the recent consolidation] Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
16 lines
373 B
C
16 lines
373 B
C
// SPDX-License-Identifier: GPL-2.0
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#ifndef _RISCV_ASM_DMA_MAPPING_H
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#define _RISCV_ASM_DMA_MAPPING_H 1
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#ifdef CONFIG_SWIOTLB
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#include <linux/swiotlb.h>
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static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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{
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return &swiotlb_dma_ops;
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}
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#else
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#include <asm-generic/dma-mapping.h>
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#endif /* CONFIG_SWIOTLB */
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#endif /* _RISCV_ASM_DMA_MAPPING_H */
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