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8b78645c93
This adds the ability for userspace to save and restore the state of the XICS interrupt presentation controllers (ICPs) via the KVM_GET/SET_ONE_REG interface. Since there is one ICP per vcpu, we simply define a new 64-bit register in the ONE_REG space for the ICP state. The state includes the CPU priority setting, the pending IPI priority, and the priority and source number of any pending external interrupt. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Alexander Graf <agraf@suse.de>
647 lines
16 KiB
C
647 lines
16 KiB
C
/*
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* Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
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*
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* Authors:
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* Alexander Graf <agraf@suse.de>
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* Kevin Wolf <mail@kevin-wolf.de>
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*
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* Description:
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* This file is derived from arch/powerpc/kvm/44x.c,
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* by Hollis Blanchard <hollisb@us.ibm.com>.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*/
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#include <linux/kvm_host.h>
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#include <linux/err.h>
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#include <linux/export.h>
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#include <linux/slab.h>
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#include <asm/reg.h>
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#include <asm/cputable.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/kvm_ppc.h>
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#include <asm/kvm_book3s.h>
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#include <asm/mmu_context.h>
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#include <asm/page.h>
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#include <linux/gfp.h>
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#include <linux/sched.h>
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#include <linux/vmalloc.h>
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#include <linux/highmem.h>
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#include "trace.h"
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#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
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/* #define EXIT_DEBUG */
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struct kvm_stats_debugfs_item debugfs_entries[] = {
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{ "exits", VCPU_STAT(sum_exits) },
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{ "mmio", VCPU_STAT(mmio_exits) },
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{ "sig", VCPU_STAT(signal_exits) },
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{ "sysc", VCPU_STAT(syscall_exits) },
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{ "inst_emu", VCPU_STAT(emulated_inst_exits) },
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{ "dec", VCPU_STAT(dec_exits) },
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{ "ext_intr", VCPU_STAT(ext_intr_exits) },
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{ "queue_intr", VCPU_STAT(queue_intr) },
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{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
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{ "pf_storage", VCPU_STAT(pf_storage) },
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{ "sp_storage", VCPU_STAT(sp_storage) },
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{ "pf_instruc", VCPU_STAT(pf_instruc) },
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{ "sp_instruc", VCPU_STAT(sp_instruc) },
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{ "ld", VCPU_STAT(ld) },
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{ "ld_slow", VCPU_STAT(ld_slow) },
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{ "st", VCPU_STAT(st) },
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{ "st_slow", VCPU_STAT(st_slow) },
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{ NULL }
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};
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void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu)
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{
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}
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void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
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{
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}
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void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
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{
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vcpu->arch.shared->srr0 = kvmppc_get_pc(vcpu);
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vcpu->arch.shared->srr1 = vcpu->arch.shared->msr | flags;
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kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec);
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vcpu->arch.mmu.reset_msr(vcpu);
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}
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static int kvmppc_book3s_vec2irqprio(unsigned int vec)
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{
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unsigned int prio;
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switch (vec) {
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case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break;
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case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break;
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case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break;
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case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break;
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case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break;
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case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break;
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case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break;
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case 0x501: prio = BOOK3S_IRQPRIO_EXTERNAL_LEVEL; break;
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case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break;
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case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break;
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case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break;
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case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break;
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case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break;
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case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
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case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
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case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
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default: prio = BOOK3S_IRQPRIO_MAX; break;
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}
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return prio;
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}
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void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
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unsigned int vec)
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{
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unsigned long old_pending = vcpu->arch.pending_exceptions;
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clear_bit(kvmppc_book3s_vec2irqprio(vec),
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&vcpu->arch.pending_exceptions);
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kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
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old_pending);
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}
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void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
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{
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vcpu->stat.queue_intr++;
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set_bit(kvmppc_book3s_vec2irqprio(vec),
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&vcpu->arch.pending_exceptions);
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#ifdef EXIT_DEBUG
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printk(KERN_INFO "Queueing interrupt %x\n", vec);
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#endif
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}
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void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
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{
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/* might as well deliver this straight away */
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kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
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}
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void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
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{
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kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
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}
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int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
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{
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return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
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}
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void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
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{
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kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
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}
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void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
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struct kvm_interrupt *irq)
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{
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unsigned int vec = BOOK3S_INTERRUPT_EXTERNAL;
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if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
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vec = BOOK3S_INTERRUPT_EXTERNAL_LEVEL;
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kvmppc_book3s_queue_irqprio(vcpu, vec);
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}
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void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
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{
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kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
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kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
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}
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int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, unsigned int priority)
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{
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int deliver = 1;
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int vec = 0;
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bool crit = kvmppc_critical_section(vcpu);
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switch (priority) {
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case BOOK3S_IRQPRIO_DECREMENTER:
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deliver = (vcpu->arch.shared->msr & MSR_EE) && !crit;
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vec = BOOK3S_INTERRUPT_DECREMENTER;
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break;
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case BOOK3S_IRQPRIO_EXTERNAL:
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case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
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deliver = (vcpu->arch.shared->msr & MSR_EE) && !crit;
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vec = BOOK3S_INTERRUPT_EXTERNAL;
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break;
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case BOOK3S_IRQPRIO_SYSTEM_RESET:
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vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
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break;
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case BOOK3S_IRQPRIO_MACHINE_CHECK:
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vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
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break;
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case BOOK3S_IRQPRIO_DATA_STORAGE:
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vec = BOOK3S_INTERRUPT_DATA_STORAGE;
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break;
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case BOOK3S_IRQPRIO_INST_STORAGE:
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vec = BOOK3S_INTERRUPT_INST_STORAGE;
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break;
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case BOOK3S_IRQPRIO_DATA_SEGMENT:
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vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
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break;
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case BOOK3S_IRQPRIO_INST_SEGMENT:
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vec = BOOK3S_INTERRUPT_INST_SEGMENT;
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break;
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case BOOK3S_IRQPRIO_ALIGNMENT:
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vec = BOOK3S_INTERRUPT_ALIGNMENT;
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break;
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case BOOK3S_IRQPRIO_PROGRAM:
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vec = BOOK3S_INTERRUPT_PROGRAM;
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break;
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case BOOK3S_IRQPRIO_VSX:
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vec = BOOK3S_INTERRUPT_VSX;
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break;
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case BOOK3S_IRQPRIO_ALTIVEC:
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vec = BOOK3S_INTERRUPT_ALTIVEC;
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break;
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case BOOK3S_IRQPRIO_FP_UNAVAIL:
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vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
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break;
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case BOOK3S_IRQPRIO_SYSCALL:
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vec = BOOK3S_INTERRUPT_SYSCALL;
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break;
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case BOOK3S_IRQPRIO_DEBUG:
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vec = BOOK3S_INTERRUPT_TRACE;
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break;
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case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
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vec = BOOK3S_INTERRUPT_PERFMON;
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break;
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default:
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deliver = 0;
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printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
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break;
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}
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#if 0
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printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
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#endif
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if (deliver)
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kvmppc_inject_interrupt(vcpu, vec, 0);
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return deliver;
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}
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/*
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* This function determines if an irqprio should be cleared once issued.
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*/
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static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
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{
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switch (priority) {
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case BOOK3S_IRQPRIO_DECREMENTER:
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/* DEC interrupts get cleared by mtdec */
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return false;
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case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
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/* External interrupts get cleared by userspace */
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return false;
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}
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return true;
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}
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int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
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{
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unsigned long *pending = &vcpu->arch.pending_exceptions;
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unsigned long old_pending = vcpu->arch.pending_exceptions;
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unsigned int priority;
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#ifdef EXIT_DEBUG
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if (vcpu->arch.pending_exceptions)
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printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
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#endif
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priority = __ffs(*pending);
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while (priority < BOOK3S_IRQPRIO_MAX) {
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if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
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clear_irqprio(vcpu, priority)) {
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clear_bit(priority, &vcpu->arch.pending_exceptions);
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break;
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}
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priority = find_next_bit(pending,
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BITS_PER_BYTE * sizeof(*pending),
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priority + 1);
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}
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/* Tell the guest about our interrupt status */
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kvmppc_update_int_pending(vcpu, *pending, old_pending);
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return 0;
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}
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pfn_t kvmppc_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn)
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{
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ulong mp_pa = vcpu->arch.magic_page_pa;
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if (!(vcpu->arch.shared->msr & MSR_SF))
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mp_pa = (uint32_t)mp_pa;
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/* Magic page override */
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if (unlikely(mp_pa) &&
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unlikely(((gfn << PAGE_SHIFT) & KVM_PAM) ==
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((mp_pa & PAGE_MASK) & KVM_PAM))) {
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ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
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pfn_t pfn;
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pfn = (pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
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get_page(pfn_to_page(pfn));
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return pfn;
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}
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return gfn_to_pfn(vcpu->kvm, gfn);
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}
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static int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, bool data,
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struct kvmppc_pte *pte)
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{
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int relocated = (vcpu->arch.shared->msr & (data ? MSR_DR : MSR_IR));
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int r;
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if (relocated) {
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r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data);
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} else {
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pte->eaddr = eaddr;
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pte->raddr = eaddr & KVM_PAM;
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pte->vpage = VSID_REAL | eaddr >> 12;
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pte->may_read = true;
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pte->may_write = true;
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pte->may_execute = true;
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r = 0;
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}
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return r;
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}
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static hva_t kvmppc_bad_hva(void)
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{
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return PAGE_OFFSET;
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}
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static hva_t kvmppc_pte_to_hva(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte,
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bool read)
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{
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hva_t hpage;
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if (read && !pte->may_read)
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goto err;
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if (!read && !pte->may_write)
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goto err;
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hpage = gfn_to_hva(vcpu->kvm, pte->raddr >> PAGE_SHIFT);
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if (kvm_is_error_hva(hpage))
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goto err;
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return hpage | (pte->raddr & ~PAGE_MASK);
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err:
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return kvmppc_bad_hva();
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}
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int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr,
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bool data)
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{
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struct kvmppc_pte pte;
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vcpu->stat.st++;
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if (kvmppc_xlate(vcpu, *eaddr, data, &pte))
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return -ENOENT;
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*eaddr = pte.raddr;
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if (!pte.may_write)
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return -EPERM;
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if (kvm_write_guest(vcpu->kvm, pte.raddr, ptr, size))
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return EMULATE_DO_MMIO;
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return EMULATE_DONE;
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}
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int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr,
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bool data)
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{
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struct kvmppc_pte pte;
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hva_t hva = *eaddr;
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vcpu->stat.ld++;
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if (kvmppc_xlate(vcpu, *eaddr, data, &pte))
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goto nopte;
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*eaddr = pte.raddr;
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hva = kvmppc_pte_to_hva(vcpu, &pte, true);
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if (kvm_is_error_hva(hva))
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goto mmio;
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if (copy_from_user(ptr, (void __user *)hva, size)) {
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printk(KERN_INFO "kvmppc_ld at 0x%lx failed\n", hva);
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goto mmio;
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}
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return EMULATE_DONE;
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nopte:
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return -ENOENT;
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mmio:
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return EMULATE_DO_MMIO;
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}
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int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
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{
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return 0;
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}
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int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
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{
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return 0;
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}
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void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
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{
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}
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int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
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{
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int i;
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regs->pc = kvmppc_get_pc(vcpu);
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regs->cr = kvmppc_get_cr(vcpu);
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regs->ctr = kvmppc_get_ctr(vcpu);
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regs->lr = kvmppc_get_lr(vcpu);
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regs->xer = kvmppc_get_xer(vcpu);
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regs->msr = vcpu->arch.shared->msr;
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regs->srr0 = vcpu->arch.shared->srr0;
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regs->srr1 = vcpu->arch.shared->srr1;
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regs->pid = vcpu->arch.pid;
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regs->sprg0 = vcpu->arch.shared->sprg0;
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regs->sprg1 = vcpu->arch.shared->sprg1;
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regs->sprg2 = vcpu->arch.shared->sprg2;
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regs->sprg3 = vcpu->arch.shared->sprg3;
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regs->sprg4 = vcpu->arch.shared->sprg4;
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regs->sprg5 = vcpu->arch.shared->sprg5;
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regs->sprg6 = vcpu->arch.shared->sprg6;
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regs->sprg7 = vcpu->arch.shared->sprg7;
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for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
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regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
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return 0;
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}
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int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
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{
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int i;
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kvmppc_set_pc(vcpu, regs->pc);
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kvmppc_set_cr(vcpu, regs->cr);
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kvmppc_set_ctr(vcpu, regs->ctr);
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kvmppc_set_lr(vcpu, regs->lr);
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kvmppc_set_xer(vcpu, regs->xer);
|
|
kvmppc_set_msr(vcpu, regs->msr);
|
|
vcpu->arch.shared->srr0 = regs->srr0;
|
|
vcpu->arch.shared->srr1 = regs->srr1;
|
|
vcpu->arch.shared->sprg0 = regs->sprg0;
|
|
vcpu->arch.shared->sprg1 = regs->sprg1;
|
|
vcpu->arch.shared->sprg2 = regs->sprg2;
|
|
vcpu->arch.shared->sprg3 = regs->sprg3;
|
|
vcpu->arch.shared->sprg4 = regs->sprg4;
|
|
vcpu->arch.shared->sprg5 = regs->sprg5;
|
|
vcpu->arch.shared->sprg6 = regs->sprg6;
|
|
vcpu->arch.shared->sprg7 = regs->sprg7;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
|
|
kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
|
|
{
|
|
return -ENOTSUPP;
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
|
|
{
|
|
return -ENOTSUPP;
|
|
}
|
|
|
|
int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
|
|
{
|
|
int r;
|
|
union kvmppc_one_reg val;
|
|
int size;
|
|
long int i;
|
|
|
|
size = one_reg_size(reg->id);
|
|
if (size > sizeof(val))
|
|
return -EINVAL;
|
|
|
|
r = kvmppc_get_one_reg(vcpu, reg->id, &val);
|
|
|
|
if (r == -EINVAL) {
|
|
r = 0;
|
|
switch (reg->id) {
|
|
case KVM_REG_PPC_DAR:
|
|
val = get_reg_val(reg->id, vcpu->arch.shared->dar);
|
|
break;
|
|
case KVM_REG_PPC_DSISR:
|
|
val = get_reg_val(reg->id, vcpu->arch.shared->dsisr);
|
|
break;
|
|
case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
|
|
i = reg->id - KVM_REG_PPC_FPR0;
|
|
val = get_reg_val(reg->id, vcpu->arch.fpr[i]);
|
|
break;
|
|
case KVM_REG_PPC_FPSCR:
|
|
val = get_reg_val(reg->id, vcpu->arch.fpscr);
|
|
break;
|
|
#ifdef CONFIG_ALTIVEC
|
|
case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
|
|
if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
|
|
r = -ENXIO;
|
|
break;
|
|
}
|
|
val.vval = vcpu->arch.vr[reg->id - KVM_REG_PPC_VR0];
|
|
break;
|
|
case KVM_REG_PPC_VSCR:
|
|
if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
|
|
r = -ENXIO;
|
|
break;
|
|
}
|
|
val = get_reg_val(reg->id, vcpu->arch.vscr.u[3]);
|
|
break;
|
|
#endif /* CONFIG_ALTIVEC */
|
|
case KVM_REG_PPC_DEBUG_INST: {
|
|
u32 opcode = INS_TW;
|
|
r = copy_to_user((u32 __user *)(long)reg->addr,
|
|
&opcode, sizeof(u32));
|
|
break;
|
|
}
|
|
#ifdef CONFIG_KVM_XICS
|
|
case KVM_REG_PPC_ICP_STATE:
|
|
if (!vcpu->arch.icp) {
|
|
r = -ENXIO;
|
|
break;
|
|
}
|
|
val = get_reg_val(reg->id, kvmppc_xics_get_icp(vcpu));
|
|
break;
|
|
#endif /* CONFIG_KVM_XICS */
|
|
default:
|
|
r = -EINVAL;
|
|
break;
|
|
}
|
|
}
|
|
if (r)
|
|
return r;
|
|
|
|
if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size))
|
|
r = -EFAULT;
|
|
|
|
return r;
|
|
}
|
|
|
|
int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
|
|
{
|
|
int r;
|
|
union kvmppc_one_reg val;
|
|
int size;
|
|
long int i;
|
|
|
|
size = one_reg_size(reg->id);
|
|
if (size > sizeof(val))
|
|
return -EINVAL;
|
|
|
|
if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size))
|
|
return -EFAULT;
|
|
|
|
r = kvmppc_set_one_reg(vcpu, reg->id, &val);
|
|
|
|
if (r == -EINVAL) {
|
|
r = 0;
|
|
switch (reg->id) {
|
|
case KVM_REG_PPC_DAR:
|
|
vcpu->arch.shared->dar = set_reg_val(reg->id, val);
|
|
break;
|
|
case KVM_REG_PPC_DSISR:
|
|
vcpu->arch.shared->dsisr = set_reg_val(reg->id, val);
|
|
break;
|
|
case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
|
|
i = reg->id - KVM_REG_PPC_FPR0;
|
|
vcpu->arch.fpr[i] = set_reg_val(reg->id, val);
|
|
break;
|
|
case KVM_REG_PPC_FPSCR:
|
|
vcpu->arch.fpscr = set_reg_val(reg->id, val);
|
|
break;
|
|
#ifdef CONFIG_ALTIVEC
|
|
case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
|
|
if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
|
|
r = -ENXIO;
|
|
break;
|
|
}
|
|
vcpu->arch.vr[reg->id - KVM_REG_PPC_VR0] = val.vval;
|
|
break;
|
|
case KVM_REG_PPC_VSCR:
|
|
if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
|
|
r = -ENXIO;
|
|
break;
|
|
}
|
|
vcpu->arch.vscr.u[3] = set_reg_val(reg->id, val);
|
|
break;
|
|
#endif /* CONFIG_ALTIVEC */
|
|
#ifdef CONFIG_KVM_XICS
|
|
case KVM_REG_PPC_ICP_STATE:
|
|
if (!vcpu->arch.icp) {
|
|
r = -ENXIO;
|
|
break;
|
|
}
|
|
r = kvmppc_xics_set_icp(vcpu,
|
|
set_reg_val(reg->id, val));
|
|
break;
|
|
#endif /* CONFIG_KVM_XICS */
|
|
default:
|
|
r = -EINVAL;
|
|
break;
|
|
}
|
|
}
|
|
|
|
return r;
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
|
|
struct kvm_translation *tr)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
|
|
struct kvm_guest_debug *dbg)
|
|
{
|
|
return -EINVAL;
|
|
}
|
|
|
|
void kvmppc_decrementer_func(unsigned long data)
|
|
{
|
|
struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
|
|
|
|
kvmppc_core_queue_dec(vcpu);
|
|
kvm_vcpu_kick(vcpu);
|
|
}
|