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4d0565a192
After some digging around I found documentation (!) of the APQ8060 EBI2 pin groups. It turns out I first need to split the group in two: ebi2cs and ebi2 proper. The chip select pins are kind of orthogonal to the other EBI2 pins since CS1B and CS2B can be muxed over address bits 7 and 6 (don't know why, but they can). This is good to fix up before we add users. Also found what the "holes" in the assignment all the way up to gpio158 was actually for. All mux documentation comes from "Snapdragon(TM) S3 APQ8060-based DragonBoard(TM) GPIO User Guide Rev. E August 10, 2012", published by Bsquare Corporation. As the documentation seems a bit hard to come by I put some comments in the group definitions so that it is clear to all readers what is going on here and what the lines are used for. Cc: Björn Andersson <bjorn.andersson@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| pinctrl-apq8064.c | ||
| pinctrl-apq8084.c | ||
| pinctrl-ipq4019.c | ||
| pinctrl-ipq8064.c | ||
| pinctrl-mdm9615.c | ||
| pinctrl-msm8x74.c | ||
| pinctrl-msm8660.c | ||
| pinctrl-msm8916.c | ||
| pinctrl-msm8960.c | ||
| pinctrl-msm8996.c | ||
| pinctrl-msm.c | ||
| pinctrl-msm.h | ||
| pinctrl-qdf2xxx.c | ||
| pinctrl-spmi-gpio.c | ||
| pinctrl-spmi-mpp.c | ||
| pinctrl-ssbi-gpio.c | ||
| pinctrl-ssbi-mpp.c | ||