Jisheng Zhang bdda5d554e riscv: introduce riscv_has_extension_[un]likely() ... Generally, riscv ISA extensions are fixed for any specific hardware platform, so a hart's features won't change after booting. This chacteristic makes it straightforward to use a static branch to check if a specific ISA extension is supported or not to optimize performance. However, some ISA extensions such as SVPBMT and ZICBOM are handled via. the alternative sequences. Basically, for ease of maintenance, we prefer to use static branches in C code, but recently, Samuel found that the static branch usage in cpu_relax() breaks building with CONFIG_CC_OPTIMIZE_FOR_SIZE[1]. As Samuel pointed out, "Having a static branch in cpu_relax() is problematic because that function is widely inlined, including in some quite complex functions like in the VDSO. A quick measurement shows this static branch is responsible by itself for around 40% of the jump table." Samuel's findings pointed out one of a few downsides of static branches usage in C code to handle ISA extensions detected at boot time: static branch's metadata in the __jump_table section, which is not discarded after ISA extensions are finalized, wastes some space. I want to try to solve the issue for all possible dynamic handling of ISA extensions at boot time. Inspired by Mark[2], this patch introduces riscv_has_extension_*() helpers, which work like static branches but are patched using alternatives, thus the metadata can be freed after patching. Link: https://lore.kernel.org/linux-riscv/20220922060958.44203-1-samuel@sholland.org/ [1] Link: https://lore.kernel.org/linux-arm-kernel/20220912162210.3626215-8-mark.rutland@arm.com/ [2] Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230128172856.3814-6-jszhang@kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2023-01-31 23:29:37 -08:00
..
boot	RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO	2022-12-27 18:01:40 +00:00
configs	RISC-V Patches for the 6.2 Merge Window, Part 1	2022-12-14 15:23:49 -08:00
errata	drivers/perf: riscv_pmu_sbi: add support for PMU variant on T-Head C9xx cores	2022-10-27 14:35:20 -07:00
include	riscv: introduce riscv_has_extension_[un]likely()	2023-01-31 23:29:37 -08:00
kernel	riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions	2023-01-31 23:29:36 -08:00
kvm	RISC-V: KVM: Add ONE_REG interface for mvendorid, marchid, and mimpid	2022-12-07 09:17:49 +05:30
lib	riscv: lib: uaccess: fix CSR_STATUS SR_SUM bit	2022-08-10 14:06:31 -07:00
mm	RISC-V Patches for the 6.2 Merge Window, Part 1	2022-12-14 15:23:49 -08:00
net	riscv, bpf: Emit fixed-length instructions for BPF_PSEUDO_FUNC	2022-12-06 20:59:27 +01:00
purgatory	riscv/purgatory: Omit use of bin2c	2022-08-11 09:32:34 -07:00
Kbuild	riscv: move errata/ and kvm/ builds to arch/riscv/Kbuild	2022-06-01 22:26:32 -07:00
Kconfig	RISC-V Patches for the 6.2 Merge Window, Part 1	2022-12-14 15:23:49 -08:00
Kconfig.debug
Kconfig.erratas	drivers/perf: riscv_pmu_sbi: add support for PMU variant on T-Head C9xx cores	2022-10-27 14:35:20 -07:00
Kconfig.socs	RISC-V: Kconfig: Remove trailing whitespace	2023-01-24 18:09:12 -08:00
Makefile	RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO	2022-12-27 18:01:40 +00:00