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b879d674e0
Add device tree source for Renesas GR-Peach board. GR-Peach is an RZ/A1H based board with 10MB of on-chip SRAM and 8MB QSPI flash storage. Add support for the board, and create a 2MB partition to use as rootfs. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
67 lines
1.1 KiB
Plaintext
67 lines
1.1 KiB
Plaintext
/*
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* Device Tree Source for the GR-Peach board
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*
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* Copyright (C) 2017 Jacopo Mondi <jacopo+renesas@jmondi.org>
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* Copyright (C) 2016 Renesas Electronics
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/dts-v1/;
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#include "r7s72100.dtsi"
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/ {
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model = "GR-Peach";
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compatible = "renesas,gr-peach", "renesas,r7s72100";
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aliases {
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serial0 = &scif2;
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};
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chosen {
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bootargs = "ignore_loglevel rw root=/dev/mtdblock0";
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stdout-path = "serial0:115200n8";
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};
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memory@20000000 {
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device_type = "memory";
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reg = <0x20000000 0x00a00000>;
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};
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lbsc {
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#address-cells = <1>;
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#size-cells = <1>;
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};
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flash@18000000 {
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compatible = "mtd-rom";
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probe-type = "map_rom";
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reg = <0x18000000 0x00800000>;
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bank-width = <4>;
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device-width = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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rootfs@600000 {
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label = "rootfs";
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reg = <0x00600000 0x00200000>;
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};
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};
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};
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&extal_clk {
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clock-frequency = <13333000>;
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};
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&usb_x1_clk {
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clock-frequency = <48000000>;
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};
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&scif2 {
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status = "okay";
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};
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