mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-25 13:14:07 +08:00
eb67d239f3
* Support for the T-Head PMU via the perf subsystem. * ftrace support for rv32. * Support for non-volatile memory devices. * Various fixes and cleanups. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmOZ6WsTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYiWGcD/wLGiHq3ekQhl5D+CaA1WlJ5XzQFfY2 bv1ZCZGdjuiv66jiMlmEsbpfUCk3bSAIjCO3MHQNDmTuPJztCHVJXOHbZFWItzzO soW4nXHKW1sGHa7hDLGQUPkltA48OdPoyqEDvlnpyEWFT+2xHwdFEURWE85FXGeq ZzFSKUQqX/V52n9TS4M4QtmNnQatR3TgIs8ttzD4JqwWFBbp4/iBfIGt6n3W24XH 9lKWikO4YOYUPl0KVIakM4d8NmX7g+7vhCKWavLke1fF/IQOlyWwA0eM8ryj33OG L1nFkqfF3mCw9i72WHftlc0rAgVqcYS8ntnQkPNpt2zPp3xFjDwEy+XiZrRE+sAp m5Ma2Tkw7G3ueBtXwP1yo+EKa7PrVFbCRD/rEpLJAC6+9ktvc7cYs39E08O+wrwT qkYThDolovqMOqfOq6afEGy5lfIa5U00vxK+3MXiE3eLEjHSJhwTXadUbwyMjJWE zOwA6p5NfDFzklESSNTtIBY85Zlh/g2q6GWCy7yBQnlaSdbpDxcnAlSZipq66Iqm 9ytdZiHid4BIRQxr5qyXTB184BvFnWNRs9NGhCj38uLEnuxwSChzwoh/WPDxLNte U9ouvwJO5U2qAZsMGJhY8W2s/9WvWpSqRhSMA/nnNV1Hh+URFz8rFXAln6kNn//v j+cYGCyjLnO1hg== =4Ak2 -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.2-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Palmer Dabbelt: - Support for the T-Head PMU via the perf subsystem - ftrace support for rv32 - Support for non-volatile memory devices - Various fixes and cleanups * tag 'riscv-for-linus-6.2-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (52 commits) Documentation: RISC-V: patch-acceptance: s/implementor/implementer Documentation: RISC-V: Mention the UEFI Standards Documentation: RISC-V: Allow patches for non-standard behavior Documentation: RISC-V: Fix a typo in patch-acceptance riscv: Fixup compile error with !MMU riscv: Fix P4D_SHIFT definition for 3-level page table mode riscv: Apply a static assert to riscv_isa_ext_id RISC-V: Add some comments about the shadow and overflow stacks RISC-V: Align the shadow stack RISC-V: Ensure Zicbom has a valid block size RISC-V: Introduce riscv_isa_extension_check RISC-V: Improve use of isa2hwcap[] riscv: Don't duplicate _ALTERNATIVE_CFG* macros riscv: alternatives: Drop the underscores from the assembly macro names riscv: alternatives: Don't name unused macro parameters riscv: Don't duplicate __ALTERNATIVE_CFG in __ALTERNATIVE_CFG_2 riscv: mm: call best_map_size many times during linear-mapping riscv: Move cast inside kernel_mapping_[pv]a_to_[vp]a riscv: Fix crash during early errata patching riscv: boot: add zstd support ...
84 lines
2.1 KiB
Plaintext
84 lines
2.1 KiB
Plaintext
menu "SoC selection"
|
|
|
|
config SOC_MICROCHIP_POLARFIRE
|
|
bool "Microchip PolarFire SoCs"
|
|
select MCHP_CLK_MPFS
|
|
help
|
|
This enables support for Microchip PolarFire SoC platforms.
|
|
|
|
config ARCH_RENESAS
|
|
bool "Renesas RISC-V SoCs"
|
|
help
|
|
This enables support for the RISC-V based Renesas SoCs.
|
|
|
|
config SOC_SIFIVE
|
|
bool "SiFive SoCs"
|
|
select SERIAL_SIFIVE if TTY
|
|
select SERIAL_SIFIVE_CONSOLE if TTY
|
|
select CLK_SIFIVE
|
|
select CLK_SIFIVE_PRCI
|
|
select ERRATA_SIFIVE if !XIP_KERNEL
|
|
help
|
|
This enables support for SiFive SoC platform hardware.
|
|
|
|
config SOC_STARFIVE
|
|
bool "StarFive SoCs"
|
|
select PINCTRL
|
|
select RESET_CONTROLLER
|
|
help
|
|
This enables support for StarFive SoC platform hardware.
|
|
|
|
config SOC_VIRT
|
|
bool "QEMU Virt Machine"
|
|
select CLINT_TIMER if RISCV_M_MODE
|
|
select POWER_RESET
|
|
select POWER_RESET_SYSCON
|
|
select POWER_RESET_SYSCON_POWEROFF
|
|
select GOLDFISH
|
|
select RTC_DRV_GOLDFISH if RTC_CLASS
|
|
select PM_GENERIC_DOMAINS if PM
|
|
select PM_GENERIC_DOMAINS_OF if PM && OF
|
|
select RISCV_SBI_CPUIDLE if CPU_IDLE && RISCV_SBI
|
|
help
|
|
This enables support for QEMU Virt Machine.
|
|
|
|
config SOC_CANAAN
|
|
bool "Canaan Kendryte K210 SoC"
|
|
depends on !MMU
|
|
select CLINT_TIMER if RISCV_M_MODE
|
|
select SERIAL_SIFIVE if TTY
|
|
select SERIAL_SIFIVE_CONSOLE if TTY
|
|
select ARCH_HAS_RESET_CONTROLLER
|
|
select PINCTRL
|
|
select COMMON_CLK
|
|
select COMMON_CLK_K210
|
|
help
|
|
This enables support for Canaan Kendryte K210 SoC platform hardware.
|
|
|
|
if SOC_CANAAN
|
|
|
|
config SOC_CANAAN_K210_DTB_BUILTIN
|
|
bool "Builtin device tree for the Canaan Kendryte K210"
|
|
depends on SOC_CANAAN
|
|
default y
|
|
select OF
|
|
select BUILTIN_DTB
|
|
help
|
|
Build a device tree for the Kendryte K210 into the Linux image.
|
|
This option should be selected if no bootloader is being used.
|
|
If unsure, say Y.
|
|
|
|
config SOC_CANAAN_K210_DTB_SOURCE
|
|
string "Source file for the Canaan Kendryte K210 builtin DTB"
|
|
depends on SOC_CANAAN
|
|
depends on SOC_CANAAN_K210_DTB_BUILTIN
|
|
default "k210_generic"
|
|
help
|
|
Base name (without suffix, relative to arch/riscv/boot/dts/canaan)
|
|
for the DTS file that will be used to produce the DTB linked into the
|
|
kernel.
|
|
|
|
endif # SOC_CANAAN
|
|
|
|
endmenu # "SoC selection"
|