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efc6b04b86
Update the firmware headers to the latest version Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
92 lines
2.1 KiB
C
92 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright 2019-2020 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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#ifndef GAUDI_FW_IF_H
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#define GAUDI_FW_IF_H
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#define GAUDI_EVENT_QUEUE_MSI_IDX 8
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#define GAUDI_NIC_PORT1_MSI_IDX 10
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#define GAUDI_NIC_PORT3_MSI_IDX 12
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#define GAUDI_NIC_PORT5_MSI_IDX 14
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#define GAUDI_NIC_PORT7_MSI_IDX 16
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#define GAUDI_NIC_PORT9_MSI_IDX 18
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#define UBOOT_FW_OFFSET 0x100000 /* 1MB in SRAM */
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#define LINUX_FW_OFFSET 0x800000 /* 8MB in HBM */
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/* HBM thermal delta in [Deg] added to composite (CTemp) */
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#define HBM_TEMP_ADJUST_COEFF 6
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enum gaudi_nic_axi_error {
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RXB,
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RXE,
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TXS,
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TXE,
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QPC_RESP,
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NON_AXI_ERR,
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TMR,
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};
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/*
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* struct eq_nic_sei_event - describes an AXI error cause.
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* @axi_error_cause: one of the events defined in enum gaudi_nic_axi_error.
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* @id: can be either 0 or 1, to further describe unit with interrupt cause
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* (i.e. TXE0 or TXE1).
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* @pad[6]: padding structure to 64bit.
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*/
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struct eq_nic_sei_event {
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__u8 axi_error_cause;
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__u8 id;
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__u8 pad[6];
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};
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/*
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* struct gaudi_nic_status - describes the status of a NIC port.
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* @port: NIC port index.
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* @bad_format_cnt: e.g. CRC.
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* @responder_out_of_sequence_psn_cnt: e.g NAK.
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* @high_ber_reinit_cnt: link reinit due to high BER.
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* @correctable_err_cnt: e.g. bit-flip.
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* @uncorrectable_err_cnt: e.g. MAC errors.
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* @retraining_cnt: re-training counter.
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* @up: is port up.
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* @pcs_link: has PCS link.
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* @phy_ready: is PHY ready.
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* @auto_neg: is Autoneg enabled.
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* @timeout_retransmission_cnt: timeout retransmission events
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* @high_ber_cnt: high ber events
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*/
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struct gaudi_nic_status {
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__u32 port;
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__u32 bad_format_cnt;
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__u32 responder_out_of_sequence_psn_cnt;
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__u32 high_ber_reinit;
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__u32 correctable_err_cnt;
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__u32 uncorrectable_err_cnt;
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__u32 retraining_cnt;
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__u8 up;
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__u8 pcs_link;
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__u8 phy_ready;
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__u8 auto_neg;
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__u32 timeout_retransmission_cnt;
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__u32 high_ber_cnt;
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};
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struct gaudi_cold_rst_data {
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union {
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struct {
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u32 spsram_init_done : 1;
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u32 reserved : 31;
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};
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__le32 data;
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};
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};
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#define GAUDI_PLL_FREQ_LOW 200000000 /* 200 MHz */
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#endif /* GAUDI_FW_IF_H */
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