linux/drivers/clk/rockchip
Heiko Stuebner bb0f736163 clk: rockchip: handle critical clocks after registering all clocks
Currently the registration of critical clocks is done in the function
shared between rk3066 and rk3188 clock trees. That results in them
getting handled maybe before all of them are registered.

Therefore move the critical clock handling down to the end of the soc-
specific clock registration function, so that all clocks are registered
before they're maybe handled as critical clock.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Michael Niewoehner <linux@mniewoehner.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-09-10 13:55:21 -07:00
..
clk-cpu.c clk: rockchip: Properly include clk.h 2015-07-20 11:11:10 -07:00
clk-inverter.c clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw) 2015-08-24 16:49:12 -07:00
clk-mmc-phase.c clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw) 2015-08-24 16:49:12 -07:00
clk-pll.c clk: rockchip: register pll mux before pll itself 2015-08-24 16:49:15 -07:00
clk-rk3188.c clk: rockchip: handle critical clocks after registering all clocks 2015-09-10 13:55:21 -07:00
clk-rk3288.c clk: rockchip: Fix PLL bandwidth 2015-07-28 11:59:12 -07:00
clk-rk3368.c clk: rockchip: add rk3368 clock controller 2015-07-06 15:09:22 -07:00
clk-rockchip.c clk: rockchip: fix function type for CLK_OF_DECLARE 2014-05-20 14:25:22 -05:00
clk.c clk: rockchip: add support for phase inverters 2015-07-06 15:04:40 -07:00
clk.h clk: rockchip: Fix PLL bandwidth 2015-07-28 11:59:12 -07:00
Makefile clk: rockchip: add rk3368 clock controller 2015-07-06 15:09:22 -07:00
softrst.c clk: rockchip: add reset controller 2014-07-13 12:17:07 -07:00