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005231128e
Let the PHY generate the RX and TX delay on the Odroid-C1 and MXIII
Plus.
Previously we did not know that these boards used an RX delay. We
assumed that setting the TX delay on the MAC side It turns out that
these boards also require an RX delay of 2ns (verified on Odroid-C1,
but the u-boot code uses the same setup on both boards). Ethernet only
worked because u-boot added this RX delay on the MAC side.
The 4ns TX delay was also wrong and the result of using an unsupported
RGMII TX clock divider setting. This has been fixed in the driver with
commit bd6f48546b ("net: stmmac: dwmac-meson8b: Fix the RGMII TX
delay on Meson8b/8m2 SoCs").
Switch to phy-mode "rgmii-id" to let the PHY side handle all the delays,
(as recommended by the Ethernet maintainers anyways) to correctly
describe the need for a 2ns RX as well as 2ns TX delay on these boards.
This fixes the Ethernet performance on Odroid-C1 where there was a huge
amount of packet loss when transmitting data due to the incorrect TX
delay.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200512215148.540322-3-martin.blumenstingl@googlemail.com
365 lines
7.8 KiB
Plaintext
365 lines
7.8 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0 OR MIT
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/*
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* Copyright 2015 Endless Mobile, Inc.
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* Author: Carlo Caione <carlo@endlessm.com>
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*/
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/dts-v1/;
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#include "meson8b.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Hardkernel ODROID-C1";
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compatible = "hardkernel,odroid-c1", "amlogic,meson8b";
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aliases {
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serial0 = &uart_AO;
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mmc0 = &sd_card_slot;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory {
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device_type = "memory";
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reg = <0x40000000 0x40000000>;
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};
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leds {
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compatible = "gpio-leds";
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blue {
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label = "c1:blue:alive";
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gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "heartbeat";
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default-state = "off";
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};
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};
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p5v0: regulator-p5v0 {
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compatible = "regulator-fixed";
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regulator-name = "P5V0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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tflash_vdd: regulator-tflash_vdd {
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/*
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* signal name from schematics: TFLASH_VDD_EN
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*/
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compatible = "regulator-fixed";
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regulator-name = "TFLASH_VDD";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_3v3>;
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gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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tf_io: gpio-regulator-tf_io {
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compatible = "regulator-gpio";
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regulator-name = "TF_IO";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_3v3>;
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/*
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* signal name from schematics: TF_3V3N_1V8_EN
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*/
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gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
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gpios-states = <0>;
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states = <3300000 0
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1800000 1>;
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};
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iio-hwmon {
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compatible = "iio-hwmon";
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io-channels = <&saradc 8>;
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};
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rtc32k_xtal: rtc32k-xtal-clk {
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/* X3 in the schematics */
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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clock-output-names = "RTC32K";
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#clock-cells = <0>;
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};
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vcc_1v8: regulator-vcc-1v8 {
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/*
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* RICHTEK RT9179 configured for a fixed output voltage of
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* 1.8V. This supplies not only VCC1V8 but also IOREF_1V8 and
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* VDD1V8 according to the schematics.
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*/
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compatible = "regulator-fixed";
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regulator-name = "VCC1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&p5v0>;
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};
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vcc_3v3: regulator-vcc-3v3 {
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/*
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* Monolithic Power Systems MP2161 configured for a fixed
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* output voltage of 3.3V. This supplies not only VCC3V3 but
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* also VDD3V3 and VDDIO_AO3V3 according to the schematics.
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*/
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compatible = "regulator-fixed";
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regulator-name = "VCC3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&p5v0>;
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};
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vcck: regulator-vcck {
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/* Monolithic Power Systems MP2161 */
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compatible = "pwm-regulator";
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regulator-name = "VCCK";
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regulator-min-microvolt = <860000>;
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regulator-max-microvolt = <1140000>;
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vin-supply = <&p5v0>;
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pwms = <&pwm_cd 0 12218 0>;
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pwm-dutycycle-range = <91 0>;
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regulator-boot-on;
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regulator-always-on;
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};
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vddc_ddr: regulator-vddc-ddr {
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/*
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* Monolithic Power Systems MP2161 configured for a fixed
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* output voltage of 1.5V. This supplies not only DDR_VDDC but
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* also DDR3_1V5 according to the schematics.
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*/
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compatible = "regulator-fixed";
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regulator-name = "DDR_VDDC";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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vin-supply = <&p5v0>;
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};
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vddee: regulator-vddee {
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/* Monolithic Power Systems MP2161 */
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compatible = "pwm-regulator";
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regulator-name = "VDDEE";
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regulator-min-microvolt = <860000>;
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regulator-max-microvolt = <1140000>;
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vin-supply = <&p5v0>;
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pwms = <&pwm_cd 1 12218 0>;
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pwm-dutycycle-range = <91 0>;
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regulator-boot-on;
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regulator-always-on;
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};
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vdd_rtc: regulator-vdd-rtc {
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/*
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* Torex Semiconductor XC6215 configured for a fixed output of
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* 0.9V.
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*/
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compatible = "regulator-fixed";
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regulator-name = "VDD_RTC";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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vin-supply = <&vcc_3v3>;
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};
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};
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&cpu0 {
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cpu-supply = <&vcck>;
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};
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&efuse {
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ethernet_mac_address: mac@1b4 {
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reg = <0x1b4 0x6>;
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};
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};
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ðmac {
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status = "okay";
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pinctrl-0 = <ð_rgmii_pins>;
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pinctrl-names = "default";
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phy-handle = <ð_phy>;
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phy-mode = "rgmii-id";
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nvmem-cells = <ðernet_mac_address>;
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nvmem-cell-names = "mac-address";
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mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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/* Realtek RTL8211F (0x001cc916) */
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eth_phy: ethernet-phy@0 {
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reg = <0>;
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reset-assert-us = <10000>;
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reset-deassert-us = <30000>;
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reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
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interrupt-parent = <&gpio_intc>;
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/* GPIOH_3 */
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interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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};
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&gpio {
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gpio-line-names = /* Bank GPIOX */
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"J2 Header Pin 35", "J2 Header Pin 36",
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"J2 Header Pin 32", "J2 Header Pin 31",
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"J2 Header Pin 29", "J2 Header Pin 18",
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"J2 Header Pin 22", "J2 Header Pin 16",
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"J2 Header Pin 23", "J2 Header Pin 21",
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"J2 Header Pin 19", "J2 Header Pin 33",
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"J2 Header Pin 8", "J2 Header Pin 10",
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"J2 Header Pin 15", "J2 Header Pin 13",
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"J2 Header Pin 24", "J2 Header Pin 26",
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/* Bank GPIOY */
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"Revision (upper)", "Revision (lower)",
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"J2 Header Pin 7", "", "J2 Header Pin 12",
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"J2 Header Pin 11", "", "", "",
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"TFLASH_VDD_EN", "", "",
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/* Bank GPIODV */
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"VCCK_PWM (PWM_C)", "I2CA_SDA", "I2CA_SCL",
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"I2CB_SDA", "I2CB_SCL", "VDDEE_PWM (PWM_D)",
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"",
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/* Bank GPIOH */
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"HDMI_HPD", "HDMI_I2C_SDA", "HDMI_I2C_SCL",
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"ETH_PHY_INTR", "ETH_PHY_NRST", "ETH_TXD1",
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"ETH_TXD0", "ETH_TXD3", "ETH_TXD2",
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"ETH_RGMII_TX_CLK",
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/* Bank CARD */
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"SD_DATA1 (SDB_D1)", "SD_DATA0 (SDB_D0)",
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"SD_CLK", "SD_CMD", "SD_DATA3 (SDB_D3)",
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"SD_DATA2 (SDB_D2)", "SD_CDN (SD_DET_N)",
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/* Bank BOOT */
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"SDC_D0 (EMMC)", "SDC_D1 (EMMC)",
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"SDC_D2 (EMMC)", "SDC_D3 (EMMC)",
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"SDC_D4 (EMMC)", "SDC_D5 (EMMC)",
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"SDC_D6 (EMMC)", "SDC_D7 (EMMC)",
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"SDC_CLK (EMMC)", "SDC_RSTn (EMMC)",
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"SDC_CMD (EMMC)", "BOOT_SEL", "", "", "",
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"", "", "", "",
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/* Bank DIF */
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"ETH_RXD1", "ETH_RXD0", "ETH_RX_DV",
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"RGMII_RX_CLK", "ETH_RXD3", "ETH_RXD2",
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"ETH_TXEN", "ETH_PHY_REF_CLK_25MOUT",
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"ETH_MDC", "ETH_MDIO";
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};
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&gpio_ao {
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gpio-line-names = "UART TX", "UART RX", "",
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"TF_3V3N_1V8_EN", "USB_HUB_RST_N",
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"USB_OTG_PWREN", "J7 Header Pin 2",
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"IR_IN", "J7 Header Pin 4",
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"J7 Header Pin 6", "J7 Header Pin 5",
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"J7 Header Pin 7", "HDMI_CEC",
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"SYS_LED", "", "";
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/*
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* WARNING: The USB Hub on the Odroid-C1/C1+ needs a reset signal
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* to be turned high in order to be detected by the USB Controller.
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* This signal should be handled by a USB specific power sequence
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* in order to reset the Hub when USB bus is powered down.
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*/
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usb-hub {
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gpio-hog;
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gpios = <GPIOAO_4 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "usb-hub-reset";
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};
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};
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&ir_receiver {
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status = "okay";
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pinctrl-0 = <&ir_recv_pins>;
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pinctrl-names = "default";
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};
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&mali {
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mali-supply = <&vddee>;
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};
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&saradc {
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status = "okay";
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vref-supply = <&vcc_1v8>;
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};
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&sdio {
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status = "okay";
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pinctrl-0 = <&sd_b_pins>;
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pinctrl-names = "default";
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/* SD card */
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sd_card_slot: slot@1 {
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compatible = "mmc-slot";
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reg = <1>;
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status = "okay";
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bus-width = <4>;
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no-sdio;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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disable-wp;
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cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
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vmmc-supply = <&tflash_vdd>;
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vqmmc-supply = <&tf_io>;
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};
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};
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&pwm_cd {
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status = "okay";
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pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>;
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pinctrl-names = "default";
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clocks = <&xtal>, <&xtal>;
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clock-names = "clkin0", "clkin1";
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};
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&rtc {
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/* needs to be enabled manually when a battery is connected */
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clocks = <&rtc32k_xtal>;
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vdd-supply = <&vdd_rtc>;
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};
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&uart_AO {
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status = "okay";
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pinctrl-0 = <&uart_ao_a_pins>;
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pinctrl-names = "default";
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};
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&usb1_phy {
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status = "okay";
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};
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&usb1 {
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status = "okay";
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};
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