Russell King bac4e960b5 [ARM] barriers: improve xchg, bitops and atomic SMP barriers ... Mathieu Desnoyers pointed out that the ARM barriers were lacking: - cmpxchg, xchg and atomic add return need memory barriers on architectures which can reorder the relative order in which memory read/writes can be seen between CPUs, which seems to include recent ARM architectures. Those barriers are currently missing on ARM. - test_and_xxx_bit were missing SMP barriers. So put these barriers in. Provide separate atomic_add/atomic_sub operations which do not require barriers. Reported-Reviewed-and-Acked-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>		2009-05-28 19:39:27 +01:00
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asm	[ARM] barriers: improve xchg, bitops and atomic SMP barriers	2009-05-28 19:39:27 +01:00