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2dee62e0d8
The GPIO polarity is missing in the cd-gpios property. Fix it, so that the following build warning is gone: DTC arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dtb arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dtb: Warning (gpios_property): cd-gpios property size (8) too small for cell size 2 in /soc/aips@53f00000/esdhc@53fb400 Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
165 lines
3.5 KiB
Plaintext
165 lines
3.5 KiB
Plaintext
/*
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* Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "imx35-eukrea-cpuimx35.dtsi"
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/ {
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model = "Eukrea CPUIMX35";
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compatible = "eukrea,mbimxsd35-baseboard", "eukrea,cpuimx35", "fsl,imx35";
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gpio_keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_bp1>;
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bp1 {
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label = "BP1";
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gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_MISC>;
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wakeup-source;
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linux,input-type = <1>;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_led1>;
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led1 {
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label = "led1";
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gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "heartbeat";
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};
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};
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sound {
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compatible = "eukrea,asoc-tlv320";
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eukrea,model = "imx35-eukrea-tlv320aic23";
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ssi-controller = <&ssi1>;
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fsl,mux-int-port = <1>;
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fsl,mux-ext-port = <4>;
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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};
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&esdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc1>;
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cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&i2c1 {
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tlv320aic23: codec@1a {
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compatible = "ti,tlv320aic23";
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reg = <0x1a>;
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};
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};
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&iomuxc {
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imx35-eukrea {
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pinctrl_audmux: audmuxgrp {
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fsl,pins = <
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MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS 0x80000000
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MX35_PAD_STXD4__AUDMUX_AUD4_TXD 0x80000000
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MX35_PAD_SRXD4__AUDMUX_AUD4_RXD 0x80000000
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MX35_PAD_SCK4__AUDMUX_AUD4_TXC 0x80000000
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>;
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};
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pinctrl_bp1: bp1grp {
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fsl,pins = <MX35_PAD_LD19__GPIO3_25 0x80000000>;
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};
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pinctrl_esdhc1: esdhc1grp {
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fsl,pins = <
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MX35_PAD_SD1_CMD__ESDHC1_CMD 0x80000000
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MX35_PAD_SD1_CLK__ESDHC1_CLK 0x80000000
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MX35_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000
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MX35_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000
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MX35_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000
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MX35_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000
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MX35_PAD_LD18__GPIO3_24 0x80000000 /* CD */
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>;
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};
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pinctrl_led1: led1grp {
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fsl,pins = <MX35_PAD_LD23__GPIO3_29 0x80000000>;
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};
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pinctrl_reg_lcd_3v3: reg-lcd-3v3 {
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fsl,pins = <MX35_PAD_D3_CLS__GPIO1_4 0x80000000>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX35_PAD_TXD1__UART1_TXD_MUX 0x1c5
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MX35_PAD_RXD1__UART1_RXD_MUX 0x1c5
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MX35_PAD_CTS1__UART1_CTS 0x1c5
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MX35_PAD_RTS1__UART1_RTS 0x1c5
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX35_PAD_RXD2__UART2_RXD_MUX 0x1c5
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MX35_PAD_TXD2__UART2_TXD_MUX 0x1c5
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MX35_PAD_RTS2__UART2_RTS 0x1c5
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MX35_PAD_CTS2__UART2_CTS 0x1c5
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>;
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};
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};
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};
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&ssi1 {
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codec-handle = <&tlv320aic23>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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uart-has-rtscts;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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uart-has-rtscts;
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status = "okay";
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};
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&usbhost1 {
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phy_type = "serial";
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dr_mode = "host";
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status = "okay";
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};
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&usbotg {
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phy_type = "utmi";
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dr_mode = "otg";
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external-vbus-divider;
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status = "okay";
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};
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