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575e93f7b5
Utilize the ability to pass board specific MDIO bus information towards a particular MDIO device thus allowing us to provide the per-port switch layout to the Marvell 88E6XXX switch driver. Since we would end-up with conflicting registration paths, do not register the "dsa" platform device anymore. Note that the MDIO devices registered by code in net/dsa/dsa2.c does not parse a dsa_platform_data, but directly take a dsa_chip_data (specific to a single switch chip), so we update the different call sites to pass this structure down to orion_ge00_switch_init(). Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
87 lines
2.6 KiB
C
87 lines
2.6 KiB
C
#ifndef __ARCH_ORION5X_COMMON_H
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#define __ARCH_ORION5X_COMMON_H
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#include <linux/reboot.h>
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struct dsa_chip_data;
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struct mv643xx_eth_platform_data;
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struct mv_sata_platform_data;
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#define ORION_MBUS_PCIE_MEM_TARGET 0x04
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#define ORION_MBUS_PCIE_MEM_ATTR 0x59
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#define ORION_MBUS_PCIE_IO_TARGET 0x04
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#define ORION_MBUS_PCIE_IO_ATTR 0x51
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#define ORION_MBUS_PCIE_WA_TARGET 0x04
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#define ORION_MBUS_PCIE_WA_ATTR 0x79
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#define ORION_MBUS_PCI_MEM_TARGET 0x03
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#define ORION_MBUS_PCI_MEM_ATTR 0x59
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#define ORION_MBUS_PCI_IO_TARGET 0x03
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#define ORION_MBUS_PCI_IO_ATTR 0x51
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#define ORION_MBUS_DEVBUS_BOOT_TARGET 0x01
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#define ORION_MBUS_DEVBUS_BOOT_ATTR 0x0f
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#define ORION_MBUS_DEVBUS_TARGET(cs) 0x01
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#define ORION_MBUS_DEVBUS_ATTR(cs) (~(1 << cs))
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#define ORION_MBUS_SRAM_TARGET 0x09
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#define ORION_MBUS_SRAM_ATTR 0x00
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/*
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* Basic Orion init functions used early by machine-setup.
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*/
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void orion5x_map_io(void);
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void orion5x_init_early(void);
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void orion5x_init_irq(void);
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void orion5x_init(void);
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void orion5x_id(u32 *dev, u32 *rev, char **dev_name);
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void clk_init(void);
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extern int orion5x_tclk;
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extern void orion5x_timer_init(void);
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void orion5x_setup_wins(void);
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void orion5x_ehci0_init(void);
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void orion5x_ehci1_init(void);
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void orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data);
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void orion5x_eth_switch_init(struct dsa_chip_data *d);
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void orion5x_i2c_init(void);
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void orion5x_sata_init(struct mv_sata_platform_data *sata_data);
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void orion5x_spi_init(void);
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void orion5x_uart0_init(void);
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void orion5x_uart1_init(void);
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void orion5x_xor_init(void);
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void orion5x_restart(enum reboot_mode, const char *);
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/*
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* PCIe/PCI functions.
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*/
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struct pci_bus;
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struct pci_sys_data;
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struct pci_dev;
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void orion5x_pcie_id(u32 *dev, u32 *rev);
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void orion5x_pci_disable(void);
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void orion5x_pci_set_cardbus_mode(void);
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int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
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struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys);
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int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
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struct tag;
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extern void __init tag_fixup_mem32(struct tag *, char **);
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#ifdef CONFIG_MACH_MSS2_DT
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extern void mss2_init(void);
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#else
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static inline void mss2_init(void) {}
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#endif
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/*****************************************************************************
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* Helpers to access Orion registers
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****************************************************************************/
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/*
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* These are not preempt-safe. Locks, if needed, must be taken
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* care of by the caller.
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*/
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#define orion5x_setbits(r, mask) writel(readl(r) | (mask), (r))
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#define orion5x_clrbits(r, mask) writel(readl(r) & ~(mask), (r))
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#endif
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