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CXL is using tracepoints for reporting RAS capability register payloads for AER events, and has plans to use tracepoints for the output payload of Get Poison List and Get Event Records commands. For organization purposes it would be nice to keep those all under a single + local CXL trace system. This also organization also potentially helps in the future when CXL drivers expand beyond generic memory expanders, however that would also entail a move away from the expander-specific cxl_dev_state context, save that for later. Note that the powerpc-specific drivers/misc/cxl/ also defines a 'cxl' trace system, however, it is unlikely that a single platform will ever load both drivers simultaneously. Cc: Steven Rostedt <rostedt@goodmis.org> Tested-by: Alison Schofield <alison.schofield@intel.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/167051869176.436579.9728373544811641087.stgit@dwillia2-xfh.jf.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
17 lines
426 B
Makefile
17 lines
426 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_CXL_BUS) += cxl_core.o
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obj-$(CONFIG_CXL_SUSPEND) += suspend.o
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ccflags-y += -I$(srctree)/drivers/cxl
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CFLAGS_trace.o = -DTRACE_INCLUDE_PATH=. -I$(src)
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cxl_core-y := port.o
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cxl_core-y += pmem.o
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cxl_core-y += regs.o
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cxl_core-y += memdev.o
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cxl_core-y += mbox.o
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cxl_core-y += pci.o
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cxl_core-y += hdm.o
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cxl_core-$(CONFIG_TRACING) += trace.o
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cxl_core-$(CONFIG_CXL_REGION) += region.o
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