Lucas Stach b814eda949 soc: imx: imx8mp-blk-ctrl: enable global pixclk with HDMI_TX_PHY PD ... NXP internal information shows that the PHY refclk is gated by the GLOBAL_TX_PIX_CLK_EN bit, so to allow the PHY PLL to lock without the LCDIF being already active, tie this bit to the HDMI_TX_PHY power domain. Fixes: e3442022f5 ("soc: imx: add i.MX8MP HDMI blk-ctrl") Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>		2022-12-31 13:40:25 +08:00
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gpc.c	soc: imx: gpc: fix power up sequencing	2020-03-16 11:39:02 +08:00
gpcv2.c	soc: imx: gpcv2: add GENPD_FLAG_ACTIVE_WAKEUP flag for usb of imx8mm/n	2022-10-29 16:20:49 +08:00
imx8m-blk-ctrl.c	soc: imx: imx8m-blk-ctrl: Defer probe if 'bus' genpd is not yet ready	2022-10-23 17:23:21 +08:00
imx8mp-blk-ctrl.c	soc: imx: imx8mp-blk-ctrl: enable global pixclk with HDMI_TX_PHY PD	2022-12-31 13:40:25 +08:00
imx93-blk-ctrl.c	soc: imx: add i.MX93 media blk ctrl driver	2022-09-17 16:31:06 +08:00
imx93-pd.c	soc: imx: imx93-pd: Fix the error handling path of imx93_pd_probe()	2022-10-29 16:26:32 +08:00
imx93-src.c	soc: imx: add i.MX93 SRC power domain driver	2022-09-17 16:31:06 +08:00
Kconfig	soc: imx: add i.MX93 SRC power domain driver	2022-09-17 16:31:06 +08:00
Makefile	soc: imx: add i.MX93 media blk ctrl driver	2022-09-17 16:31:06 +08:00
soc-imx8m.c	soc: imx8m: Enable OCOTP clock before reading the register	2022-11-14 15:52:53 +08:00
soc-imx.c	soc: imx: Remove Layerscape check	2022-01-28 17:46:08 +08:00