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64d11406de
This patch to add a generic PHY driver for ROCKCHIP usb PHYs, currently this driver can support RK3288. The RK3288 SoC have three independent USB PHY IPs which are all configured through a set of registers located in the GRF (general register files) module. Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
159 lines
3.9 KiB
C
159 lines
3.9 KiB
C
/*
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* Rockchip usb PHY driver
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*
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* Copyright (C) 2014 Yunzhi Li <lyz@rock-chips.com>
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* Copyright (C) 2014 ROCKCHIP, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/phy/phy.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/reset.h>
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#include <linux/regmap.h>
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#include <linux/mfd/syscon.h>
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/*
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* The higher 16-bit of this register is used for write protection
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* only if BIT(13 + 16) set to 1 the BIT(13) can be written.
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*/
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#define SIDDQ_WRITE_ENA BIT(29)
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#define SIDDQ_ON BIT(13)
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#define SIDDQ_OFF (0 << 13)
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struct rockchip_usb_phy {
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unsigned int reg_offset;
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struct regmap *reg_base;
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struct clk *clk;
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struct phy *phy;
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};
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static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
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bool siddq)
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{
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return regmap_write(phy->reg_base, phy->reg_offset,
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SIDDQ_WRITE_ENA | (siddq ? SIDDQ_ON : SIDDQ_OFF));
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}
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static int rockchip_usb_phy_power_off(struct phy *_phy)
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{
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struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
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int ret = 0;
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/* Power down usb phy analog blocks by set siddq 1 */
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ret = rockchip_usb_phy_power(phy, 1);
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if (ret)
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return ret;
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clk_disable_unprepare(phy->clk);
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if (ret)
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return ret;
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return 0;
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}
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static int rockchip_usb_phy_power_on(struct phy *_phy)
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{
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struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
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int ret = 0;
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ret = clk_prepare_enable(phy->clk);
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if (ret)
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return ret;
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/* Power up usb phy analog blocks by set siddq 0 */
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ret = rockchip_usb_phy_power(phy, 0);
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if (ret)
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return ret;
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return 0;
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}
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static struct phy_ops ops = {
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.power_on = rockchip_usb_phy_power_on,
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.power_off = rockchip_usb_phy_power_off,
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.owner = THIS_MODULE,
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};
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static int rockchip_usb_phy_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct rockchip_usb_phy *rk_phy;
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struct phy_provider *phy_provider;
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struct device_node *child;
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struct regmap *grf;
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unsigned int reg_offset;
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grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf");
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if (IS_ERR(grf)) {
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dev_err(&pdev->dev, "Missing rockchip,grf property\n");
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return PTR_ERR(grf);
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}
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for_each_available_child_of_node(dev->of_node, child) {
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rk_phy = devm_kzalloc(dev, sizeof(*rk_phy), GFP_KERNEL);
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if (!rk_phy)
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return -ENOMEM;
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if (of_property_read_u32(child, "reg", ®_offset)) {
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dev_err(dev, "missing reg property in node %s\n",
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child->name);
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return -EINVAL;
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}
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rk_phy->reg_offset = reg_offset;
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rk_phy->reg_base = grf;
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rk_phy->clk = of_clk_get_by_name(child, "phyclk");
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if (IS_ERR(rk_phy->clk))
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rk_phy->clk = NULL;
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rk_phy->phy = devm_phy_create(dev, child, &ops);
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if (IS_ERR(rk_phy->phy)) {
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dev_err(dev, "failed to create PHY\n");
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return PTR_ERR(rk_phy->phy);
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}
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phy_set_drvdata(rk_phy->phy, rk_phy);
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}
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phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
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return PTR_ERR_OR_ZERO(phy_provider);
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}
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static const struct of_device_id rockchip_usb_phy_dt_ids[] = {
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{ .compatible = "rockchip,rk3288-usb-phy" },
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{}
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};
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MODULE_DEVICE_TABLE(of, rockchip_usb_phy_dt_ids);
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static struct platform_driver rockchip_usb_driver = {
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.probe = rockchip_usb_phy_probe,
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.driver = {
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.name = "rockchip-usb-phy",
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.owner = THIS_MODULE,
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.of_match_table = rockchip_usb_phy_dt_ids,
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},
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};
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module_platform_driver(rockchip_usb_driver);
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MODULE_AUTHOR("Yunzhi Li <lyz@rock-chips.com>");
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MODULE_DESCRIPTION("Rockchip USB 2.0 PHY driver");
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MODULE_LICENSE("GPL v2");
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