Zong Li b5fca7c55f riscv: Define AT_VECTOR_SIZE_ARCH for ARCH_DLINFO ... AT_VECTOR_SIZE_ARCH should be defined with the maximum number of NEW_AUX_ENT entries that ARCH_DLINFO can contain, but it wasn't defined for RISC-V at all even though ARCH_DLINFO will contain one NEW_AUX_ENT for the VDSO address. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Reviewed-by: Pekka Enberg <penberg@kernel.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>		2020-09-15 18:46:07 -07:00
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asm	RISC-V: Remove CLINT related code from timer and arch	2020-08-20 10:58:13 -07:00
uapi/asm	riscv: Define AT_VECTOR_SIZE_ARCH for ARCH_DLINFO	2020-09-15 18:46:07 -07:00