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52c9f93a9c
When building arm64 defconfig + CONFIG_LTO_CLANG_{FULL,THIN}=y after
commit 558c303c97 ("arm64: Mitigate spectre style branch history side
channels"), the following error occurs:
<instantiation>:4:2: error: invalid fixup for movz/movk instruction
mov w0, #ARM_SMCCC_ARCH_WORKAROUND_3
^
Marc figured out that moving "#include <linux/init.h>" in
include/linux/arm-smccc.h into a !__ASSEMBLY__ block resolves it. The
full include chain with CONFIG_LTO=y from include/linux/arm-smccc.h:
include/linux/init.h
include/linux/compiler.h
arch/arm64/include/asm/rwonce.h
arch/arm64/include/asm/alternative-macros.h
arch/arm64/include/asm/assembler.h
The asm/alternative-macros.h include in asm/rwonce.h only happens when
CONFIG_LTO is set, which ultimately casues asm/assembler.h to be
included before the definition of ARM_SMCCC_ARCH_WORKAROUND_3. As a
result, the preprocessor does not expand ARM_SMCCC_ARCH_WORKAROUND_3 in
__mitigate_spectre_bhb_fw, which results in the error above.
Avoid this problem by just avoiding the CONFIG_LTO=y __READ_ONCE() block
in asm/rwonce.h with assembly files, as nothing in that block is useful
to assembly files, which allows ARM_SMCCC_ARCH_WORKAROUND_3 to be
properly expanded with CONFIG_LTO=y builds.
Fixes: e35123d83e ("arm64: lto: Strengthen READ_ONCE() to acquire when CONFIG_LTO=y")
Cc: <stable@vger.kernel.org> # 5.11.x
Link: https://lore.kernel.org/r/20220309155716.3988480-1-maz@kernel.org/
Reported-by: Marc Zyngier <maz@kernel.org>
Acked-by: James Morse <james.morse@arm.com>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Link: https://lore.kernel.org/r/20220309191633.2307110-1-nathan@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
74 lines
2.0 KiB
C
74 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020 Google LLC.
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*/
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#ifndef __ASM_RWONCE_H
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#define __ASM_RWONCE_H
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#if defined(CONFIG_LTO) && !defined(__ASSEMBLY__)
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#include <linux/compiler_types.h>
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#include <asm/alternative-macros.h>
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#ifndef BUILD_VDSO
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#ifdef CONFIG_AS_HAS_LDAPR
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#define __LOAD_RCPC(sfx, regs...) \
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ALTERNATIVE( \
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"ldar" #sfx "\t" #regs, \
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".arch_extension rcpc\n" \
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"ldapr" #sfx "\t" #regs, \
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ARM64_HAS_LDAPR)
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#else
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#define __LOAD_RCPC(sfx, regs...) "ldar" #sfx "\t" #regs
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#endif /* CONFIG_AS_HAS_LDAPR */
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/*
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* When building with LTO, there is an increased risk of the compiler
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* converting an address dependency headed by a READ_ONCE() invocation
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* into a control dependency and consequently allowing for harmful
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* reordering by the CPU.
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*
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* Ensure that such transformations are harmless by overriding the generic
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* READ_ONCE() definition with one that provides RCpc acquire semantics
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* when building with LTO.
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*/
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#define __READ_ONCE(x) \
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({ \
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typeof(&(x)) __x = &(x); \
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int atomic = 1; \
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union { __unqual_scalar_typeof(*__x) __val; char __c[1]; } __u; \
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switch (sizeof(x)) { \
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case 1: \
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asm volatile(__LOAD_RCPC(b, %w0, %1) \
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: "=r" (*(__u8 *)__u.__c) \
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: "Q" (*__x) : "memory"); \
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break; \
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case 2: \
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asm volatile(__LOAD_RCPC(h, %w0, %1) \
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: "=r" (*(__u16 *)__u.__c) \
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: "Q" (*__x) : "memory"); \
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break; \
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case 4: \
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asm volatile(__LOAD_RCPC(, %w0, %1) \
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: "=r" (*(__u32 *)__u.__c) \
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: "Q" (*__x) : "memory"); \
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break; \
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case 8: \
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asm volatile(__LOAD_RCPC(, %0, %1) \
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: "=r" (*(__u64 *)__u.__c) \
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: "Q" (*__x) : "memory"); \
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break; \
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default: \
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atomic = 0; \
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} \
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atomic ? (typeof(*__x))__u.__val : (*(volatile typeof(__x))__x);\
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})
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#endif /* !BUILD_VDSO */
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#endif /* CONFIG_LTO && !__ASSEMBLY__ */
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#include <asm-generic/rwonce.h>
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#endif /* __ASM_RWONCE_H */
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