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931f3dc3f0
Enable the realtime clock. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
83 lines
1.1 KiB
Plaintext
83 lines
1.1 KiB
Plaintext
/*
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* Device Tree Source for the RZ/A1H RSK board
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*
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* Copyright (C) 2016 Renesas Electronics
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/dts-v1/;
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#include "r7s72100.dtsi"
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/ {
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model = "RSKRZA1";
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compatible = "renesas,rskrza1", "renesas,r7s72100";
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aliases {
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serial0 = &scif2;
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};
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chosen {
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bootargs = "ignore_loglevel";
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stdout-path = "serial0:115200n8";
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};
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memory@8000000 {
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device_type = "memory";
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reg = <0x08000000 0x02000000>;
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};
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lbsc {
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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&extal_clk {
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clock-frequency = <13330000>;
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};
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&usb_x1_clk {
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clock-frequency = <48000000>;
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};
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&rtc_x1_clk {
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clock-frequency = <32768>;
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};
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&mtu2 {
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status = "okay";
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};
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ðer {
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status = "okay";
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renesas,no-ether-link;
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phy-handle = <&phy0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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&sdhi1 {
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bus-width = <4>;
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status = "okay";
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};
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&ostm0 {
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status = "okay";
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};
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&ostm1 {
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status = "okay";
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};
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&rtc {
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status = "okay";
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};
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&scif2 {
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status = "okay";
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};
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