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This adds the shared devicetree files for the Veyron device family. They are split, as not all veyron devices are chromebooks and not all contain a sd-card slot. Signed-off-by: Alexandru M Stan <amstan@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Doug Anderson <dianders@chromium.org>
233 lines
5.7 KiB
Plaintext
233 lines
5.7 KiB
Plaintext
/*
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* Google Veyron (and derivatives) board device tree source
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* Chromebook specific parts
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*
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* Copyright 2015 Google, Inc
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <dt-bindings/clock/rockchip,rk808.h>
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#include <dt-bindings/input/input.h>
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#include "rk3288-veyron.dtsi"
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#include "rk3288-veyron-sdmmc.dtsi"
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/ {
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aliases {
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/* Assign 20 so we don't get confused w/ builtin ones */
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i2c20 = &i2c_tunnel;
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};
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gpio-charger {
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compatible = "gpio-charger";
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charger-type = "mains";
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gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&ac_present_ap>;
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};
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/* A non-regulated voltage from power supply or battery */
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vccsys: vccsys {
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compatible = "regulator-fixed";
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regulator-name = "vccsys";
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regulator-boot-on;
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regulator-always-on;
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};
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vcc33_sys: vcc33-sys {
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vin-supply = <&vccsys>;
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};
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vcc_5v: vcc-5v {
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vin-supply = <&vccsys>;
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};
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/* This turns on vbus for host1 (dwc2) */
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vcc5_host1: vcc5-host1-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&host1_pwr_en>;
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regulator-name = "vcc5_host1";
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regulator-always-on;
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regulator-boot-on;
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};
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/* This turns on vbus for otg for host mode (dwc2) */
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vcc5v_otg: vcc5v-otg-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&usbotg_pwren_h>;
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regulator-name = "vcc5_host2";
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&gpio_keys {
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pinctrl-0 = <&pwr_key_l &ap_lid_int_l>;
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lid {
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label = "Lid";
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gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
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gpio-key,wakeup;
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linux,code = <0>; /* SW_LID */
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linux,input-type = <5>; /* EV_SW */
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debounce-interval = <1>;
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};
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};
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&rk808 {
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vcc11-supply = <&vcc_5v>;
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regulators {
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vcc33_ccd: LDO_REG8 {
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regulator-name = "vcc33_ccd";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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};
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};
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&spi0 {
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status = "okay";
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cros_ec: ec@0 {
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compatible = "google,cros-ec-spi";
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reg = <0>;
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google,cros-ec-spi-pre-delay = <30>;
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interrupt-parent = <&gpio7>;
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interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&ec_int>;
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spi-max-frequency = <3000000>;
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i2c_tunnel: i2c-tunnel {
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compatible = "google,cros-ec-i2c-tunnel";
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google,remote-bus = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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};
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&i2c4 {
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trackpad@15 {
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compatible = "elan,ekth3000";
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reg = <0x15>;
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interrupt-parent = <&gpio7>;
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interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
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pinctrl-names = "default";
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pinctrl-0 = <&trackpad_int>;
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vcc-supply = <&vcc33_io>;
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wakeup-source;
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};
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};
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&pinctrl {
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pinctrl-0 = <
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/* Common for sleep and wake, but no owners */
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&global_pwroff
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/* Wake only */
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&suspend_l_wake
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>;
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pinctrl-1 = <
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/* Common for sleep and wake, but no owners */
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&global_pwroff
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/* Sleep only */
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&suspend_l_sleep
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>;
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buttons {
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ap_lid_int_l: ap-lid-int-l {
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rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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charger {
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ac_present_ap: ac-present-ap {
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rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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cros-ec {
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ec_int: ec-int {
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rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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suspend {
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suspend_l_wake: suspend-l-wake {
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rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_low>;
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};
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suspend_l_sleep: suspend-l-sleep {
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rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_high>;
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};
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};
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trackpad {
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trackpad_int: trackpad-int {
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rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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usb-host {
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host1_pwr_en: host1-pwr-en {
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rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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usbotg_pwren_h: usbotg-pwren-h {
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rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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#include "cros-ec-keyboard.dtsi"
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