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987068fcbd
The PCI msi-map code is already doing double-duty translating IDs and retrieving MSI parents, which unsurprisingly is the same functionality we need for the identically-formatted PCI iommu-map property. Drag the core parsing routine up yet another layer into the general OF-PCI code, and further generalise it for either kind of lookup in either flavour of map property. Acked-by: Rob Herring <robh+dt@kernel.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
413 lines
11 KiB
C
413 lines
11 KiB
C
#define pr_fmt(fmt) "OF: PCI: " fmt
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#include <linux/kernel.h>
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#include <linux/export.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/of_pci.h>
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#include <linux/slab.h>
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static inline int __of_pci_pci_compare(struct device_node *node,
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unsigned int data)
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{
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int devfn;
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devfn = of_pci_get_devfn(node);
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if (devfn < 0)
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return 0;
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return devfn == data;
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}
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struct device_node *of_pci_find_child_device(struct device_node *parent,
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unsigned int devfn)
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{
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struct device_node *node, *node2;
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for_each_child_of_node(parent, node) {
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if (__of_pci_pci_compare(node, devfn))
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return node;
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/*
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* Some OFs create a parent node "multifunc-device" as
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* a fake root for all functions of a multi-function
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* device we go down them as well.
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*/
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if (!strcmp(node->name, "multifunc-device")) {
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for_each_child_of_node(node, node2) {
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if (__of_pci_pci_compare(node2, devfn)) {
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of_node_put(node);
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return node2;
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}
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}
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}
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}
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return NULL;
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}
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EXPORT_SYMBOL_GPL(of_pci_find_child_device);
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/**
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* of_pci_get_devfn() - Get device and function numbers for a device node
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* @np: device node
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*
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* Parses a standard 5-cell PCI resource and returns an 8-bit value that can
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* be passed to the PCI_SLOT() and PCI_FUNC() macros to extract the device
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* and function numbers respectively. On error a negative error code is
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* returned.
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*/
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int of_pci_get_devfn(struct device_node *np)
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{
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unsigned int size;
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const __be32 *reg;
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reg = of_get_property(np, "reg", &size);
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if (!reg || size < 5 * sizeof(__be32))
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return -EINVAL;
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return (be32_to_cpup(reg) >> 8) & 0xff;
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}
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EXPORT_SYMBOL_GPL(of_pci_get_devfn);
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/**
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* of_pci_parse_bus_range() - parse the bus-range property of a PCI device
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* @node: device node
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* @res: address to a struct resource to return the bus-range
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*
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* Returns 0 on success or a negative error-code on failure.
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*/
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int of_pci_parse_bus_range(struct device_node *node, struct resource *res)
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{
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const __be32 *values;
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int len;
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values = of_get_property(node, "bus-range", &len);
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if (!values || len < sizeof(*values) * 2)
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return -EINVAL;
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res->name = node->name;
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res->start = be32_to_cpup(values++);
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res->end = be32_to_cpup(values);
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res->flags = IORESOURCE_BUS;
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return 0;
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}
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EXPORT_SYMBOL_GPL(of_pci_parse_bus_range);
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/**
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* This function will try to obtain the host bridge domain number by
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* finding a property called "linux,pci-domain" of the given device node.
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*
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* @node: device tree node with the domain information
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*
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* Returns the associated domain number from DT in the range [0-0xffff], or
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* a negative value if the required property is not found.
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*/
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int of_get_pci_domain_nr(struct device_node *node)
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{
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const __be32 *value;
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int len;
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u16 domain;
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value = of_get_property(node, "linux,pci-domain", &len);
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if (!value || len < sizeof(*value))
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return -EINVAL;
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domain = (u16)be32_to_cpup(value);
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return domain;
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}
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EXPORT_SYMBOL_GPL(of_get_pci_domain_nr);
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/**
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* of_pci_check_probe_only - Setup probe only mode if linux,pci-probe-only
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* is present and valid
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*/
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void of_pci_check_probe_only(void)
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{
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u32 val;
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int ret;
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ret = of_property_read_u32(of_chosen, "linux,pci-probe-only", &val);
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if (ret) {
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if (ret == -ENODATA || ret == -EOVERFLOW)
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pr_warn("linux,pci-probe-only without valid value, ignoring\n");
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return;
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}
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if (val)
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pci_add_flags(PCI_PROBE_ONLY);
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else
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pci_clear_flags(PCI_PROBE_ONLY);
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pr_info("PROBE_ONLY %sabled\n", val ? "en" : "dis");
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}
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EXPORT_SYMBOL_GPL(of_pci_check_probe_only);
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#if defined(CONFIG_OF_ADDRESS)
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/**
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* of_pci_get_host_bridge_resources - Parse PCI host bridge resources from DT
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* @dev: device node of the host bridge having the range property
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* @busno: bus number associated with the bridge root bus
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* @bus_max: maximum number of buses for this bridge
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* @resources: list where the range of resources will be added after DT parsing
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* @io_base: pointer to a variable that will contain on return the physical
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* address for the start of the I/O range. Can be NULL if the caller doesn't
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* expect IO ranges to be present in the device tree.
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*
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* It is the caller's job to free the @resources list.
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*
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* This function will parse the "ranges" property of a PCI host bridge device
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* node and setup the resource mapping based on its content. It is expected
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* that the property conforms with the Power ePAPR document.
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*
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* It returns zero if the range parsing has been successful or a standard error
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* value if it failed.
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*/
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int of_pci_get_host_bridge_resources(struct device_node *dev,
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unsigned char busno, unsigned char bus_max,
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struct list_head *resources, resource_size_t *io_base)
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{
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struct resource_entry *window;
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struct resource *res;
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struct resource *bus_range;
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struct of_pci_range range;
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struct of_pci_range_parser parser;
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char range_type[4];
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int err;
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if (io_base)
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*io_base = (resource_size_t)OF_BAD_ADDR;
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bus_range = kzalloc(sizeof(*bus_range), GFP_KERNEL);
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if (!bus_range)
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return -ENOMEM;
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pr_info("host bridge %s ranges:\n", dev->full_name);
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err = of_pci_parse_bus_range(dev, bus_range);
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if (err) {
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bus_range->start = busno;
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bus_range->end = bus_max;
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bus_range->flags = IORESOURCE_BUS;
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pr_info(" No bus range found for %s, using %pR\n",
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dev->full_name, bus_range);
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} else {
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if (bus_range->end > bus_range->start + bus_max)
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bus_range->end = bus_range->start + bus_max;
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}
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pci_add_resource(resources, bus_range);
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/* Check for ranges property */
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err = of_pci_range_parser_init(&parser, dev);
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if (err)
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goto parse_failed;
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pr_debug("Parsing ranges property...\n");
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for_each_of_pci_range(&parser, &range) {
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/* Read next ranges element */
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if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_IO)
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snprintf(range_type, 4, " IO");
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else if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_MEM)
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snprintf(range_type, 4, "MEM");
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else
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snprintf(range_type, 4, "err");
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pr_info(" %s %#010llx..%#010llx -> %#010llx\n", range_type,
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range.cpu_addr, range.cpu_addr + range.size - 1,
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range.pci_addr);
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/*
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* If we failed translation or got a zero-sized region
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* then skip this range
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*/
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if (range.cpu_addr == OF_BAD_ADDR || range.size == 0)
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continue;
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res = kzalloc(sizeof(struct resource), GFP_KERNEL);
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if (!res) {
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err = -ENOMEM;
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goto parse_failed;
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}
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err = of_pci_range_to_resource(&range, dev, res);
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if (err) {
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kfree(res);
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continue;
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}
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if (resource_type(res) == IORESOURCE_IO) {
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if (!io_base) {
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pr_err("I/O range found for %s. Please provide an io_base pointer to save CPU base address\n",
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dev->full_name);
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err = -EINVAL;
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goto conversion_failed;
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}
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if (*io_base != (resource_size_t)OF_BAD_ADDR)
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pr_warn("More than one I/O resource converted for %s. CPU base address for old range lost!\n",
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dev->full_name);
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*io_base = range.cpu_addr;
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}
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pci_add_resource_offset(resources, res, res->start - range.pci_addr);
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}
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return 0;
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conversion_failed:
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kfree(res);
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parse_failed:
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resource_list_for_each_entry(window, resources)
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kfree(window->res);
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pci_free_resource_list(resources);
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return err;
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}
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EXPORT_SYMBOL_GPL(of_pci_get_host_bridge_resources);
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#endif /* CONFIG_OF_ADDRESS */
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#ifdef CONFIG_PCI_MSI
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static LIST_HEAD(of_pci_msi_chip_list);
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static DEFINE_MUTEX(of_pci_msi_chip_mutex);
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int of_pci_msi_chip_add(struct msi_controller *chip)
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{
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if (!of_property_read_bool(chip->of_node, "msi-controller"))
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return -EINVAL;
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mutex_lock(&of_pci_msi_chip_mutex);
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list_add(&chip->list, &of_pci_msi_chip_list);
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mutex_unlock(&of_pci_msi_chip_mutex);
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return 0;
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}
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EXPORT_SYMBOL_GPL(of_pci_msi_chip_add);
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void of_pci_msi_chip_remove(struct msi_controller *chip)
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{
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mutex_lock(&of_pci_msi_chip_mutex);
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list_del(&chip->list);
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mutex_unlock(&of_pci_msi_chip_mutex);
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}
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EXPORT_SYMBOL_GPL(of_pci_msi_chip_remove);
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struct msi_controller *of_pci_find_msi_chip_by_node(struct device_node *of_node)
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{
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struct msi_controller *c;
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mutex_lock(&of_pci_msi_chip_mutex);
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list_for_each_entry(c, &of_pci_msi_chip_list, list) {
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if (c->of_node == of_node) {
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mutex_unlock(&of_pci_msi_chip_mutex);
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return c;
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}
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}
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mutex_unlock(&of_pci_msi_chip_mutex);
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return NULL;
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}
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EXPORT_SYMBOL_GPL(of_pci_find_msi_chip_by_node);
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#endif /* CONFIG_PCI_MSI */
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/**
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* of_pci_map_rid - Translate a requester ID through a downstream mapping.
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* @np: root complex device node.
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* @rid: PCI requester ID to map.
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* @map_name: property name of the map to use.
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* @map_mask_name: optional property name of the mask to use.
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* @target: optional pointer to a target device node.
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* @id_out: optional pointer to receive the translated ID.
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*
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* Given a PCI requester ID, look up the appropriate implementation-defined
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* platform ID and/or the target device which receives transactions on that
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* ID, as per the "iommu-map" and "msi-map" bindings. Either of @target or
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* @id_out may be NULL if only the other is required. If @target points to
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* a non-NULL device node pointer, only entries targeting that node will be
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* matched; if it points to a NULL value, it will receive the device node of
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* the first matching target phandle, with a reference held.
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*
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* Return: 0 on success or a standard error code on failure.
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*/
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int of_pci_map_rid(struct device_node *np, u32 rid,
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const char *map_name, const char *map_mask_name,
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struct device_node **target, u32 *id_out)
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{
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u32 map_mask, masked_rid;
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int map_len;
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const __be32 *map = NULL;
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if (!np || !map_name || (!target && !id_out))
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return -EINVAL;
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map = of_get_property(np, map_name, &map_len);
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if (!map) {
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if (target)
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return -ENODEV;
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/* Otherwise, no map implies no translation */
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*id_out = rid;
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return 0;
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}
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if (!map_len || map_len % (4 * sizeof(*map))) {
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pr_err("%s: Error: Bad %s length: %d\n", np->full_name,
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map_name, map_len);
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return -EINVAL;
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}
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/* The default is to select all bits. */
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map_mask = 0xffffffff;
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/*
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* Can be overridden by "{iommu,msi}-map-mask" property.
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* If of_property_read_u32() fails, the default is used.
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*/
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if (map_mask_name)
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of_property_read_u32(np, map_mask_name, &map_mask);
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masked_rid = map_mask & rid;
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for ( ; map_len > 0; map_len -= 4 * sizeof(*map), map += 4) {
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struct device_node *phandle_node;
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u32 rid_base = be32_to_cpup(map + 0);
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u32 phandle = be32_to_cpup(map + 1);
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u32 out_base = be32_to_cpup(map + 2);
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u32 rid_len = be32_to_cpup(map + 3);
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if (rid_base & ~map_mask) {
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pr_err("%s: Invalid %s translation - %s-mask (0x%x) ignores rid-base (0x%x)\n",
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np->full_name, map_name, map_name,
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map_mask, rid_base);
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return -EFAULT;
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}
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if (masked_rid < rid_base || masked_rid >= rid_base + rid_len)
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continue;
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phandle_node = of_find_node_by_phandle(phandle);
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if (!phandle_node)
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return -ENODEV;
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if (target) {
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if (*target)
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of_node_put(phandle_node);
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else
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*target = phandle_node;
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if (*target != phandle_node)
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continue;
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}
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if (id_out)
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*id_out = masked_rid - rid_base + out_base;
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pr_debug("%s: %s, using mask %08x, rid-base: %08x, out-base: %08x, length: %08x, rid: %08x -> %08x\n",
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np->full_name, map_name, map_mask, rid_base, out_base,
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rid_len, rid, *id_out);
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return 0;
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}
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pr_err("%s: Invalid %s translation - no match for rid 0x%x on %s\n",
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np->full_name, map_name, rid,
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target && *target ? (*target)->full_name : "any target");
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return -EFAULT;
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}
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