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b511593d71
sclk_g3d clock doesn't have enable/disable bits, but the driver hijacked g3d gate clock bits for this purpose and didn't provide real g3d clock at all. This patch fixes this issue by adding proper definition for g3d clock and removing incorrect access to GATE_IP_G3D register in sclk_g3d. In addition CLK_SET_RATE_PARENT flag is dropped from sclk_g3d, because it does not make any sense and most likely has been added by mistake. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> [tomasz.figa@gmail.com: Adjusted commit message.] Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> |
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.. | ||
clk-exynos4.c | ||
clk-exynos3250.c | ||
clk-exynos5250.c | ||
clk-exynos5260.c | ||
clk-exynos5260.h | ||
clk-exynos5410.c | ||
clk-exynos5420.c | ||
clk-exynos5440.c | ||
clk-exynos-audss.c | ||
clk-exynos-clkout.c | ||
clk-pll.c | ||
clk-pll.h | ||
clk-s3c64xx.c | ||
clk-s3c2410-dclk.c | ||
clk-s3c2410.c | ||
clk-s3c2412.c | ||
clk-s3c2443.c | ||
clk-s5pv210-audss.c | ||
clk-s5pv210.c | ||
clk.c | ||
clk.h | ||
Kconfig | ||
Makefile |