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cppcheck warning: sound/soc/sh/siu_pcm.c:225:8: style: Variable 'virt' is assigned a value that is never used. [unreadVariable] virt = PERIOD_OFFSET(rt->dma_area, ^ It's not clear what this variable was needed for, remove it. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20210219231635.5749-9-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
553 lines
15 KiB
C
553 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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//
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// siu_pcm.c - ALSA driver for Renesas SH7343, SH7722 SIU peripheral.
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//
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// Copyright (C) 2009-2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
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// Copyright (C) 2006 Carlos Munoz <carlos@kenati.com>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/dmaengine.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <sound/control.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <asm/siu.h>
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#include "siu.h"
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#define DRV_NAME "siu-i2s"
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#define GET_MAX_PERIODS(buf_bytes, period_bytes) \
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((buf_bytes) / (period_bytes))
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#define PERIOD_OFFSET(buf_addr, period_num, period_bytes) \
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((buf_addr) + ((period_num) * (period_bytes)))
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#define RWF_STM_RD 0x01 /* Read in progress */
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#define RWF_STM_WT 0x02 /* Write in progress */
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struct siu_port *siu_ports[SIU_PORT_NUM];
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/* transfersize is number of u32 dma transfers per period */
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static int siu_pcm_stmwrite_stop(struct siu_port *port_info)
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{
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struct siu_info *info = siu_i2s_data;
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u32 __iomem *base = info->reg;
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struct siu_stream *siu_stream = &port_info->playback;
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u32 stfifo;
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if (!siu_stream->rw_flg)
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return -EPERM;
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/* output FIFO disable */
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stfifo = siu_read32(base + SIU_STFIFO);
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siu_write32(base + SIU_STFIFO, stfifo & ~0x0c180c18);
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pr_debug("%s: STFIFO %x -> %x\n", __func__,
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stfifo, stfifo & ~0x0c180c18);
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/* during stmwrite clear */
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siu_stream->rw_flg = 0;
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return 0;
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}
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static int siu_pcm_stmwrite_start(struct siu_port *port_info)
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{
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struct siu_stream *siu_stream = &port_info->playback;
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if (siu_stream->rw_flg)
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return -EPERM;
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/* Current period in buffer */
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port_info->playback.cur_period = 0;
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/* during stmwrite flag set */
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siu_stream->rw_flg = RWF_STM_WT;
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/* DMA transfer start */
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queue_work(system_highpri_wq, &siu_stream->work);
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return 0;
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}
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static void siu_dma_tx_complete(void *arg)
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{
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struct siu_stream *siu_stream = arg;
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if (!siu_stream->rw_flg)
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return;
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/* Update completed period count */
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if (++siu_stream->cur_period >=
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GET_MAX_PERIODS(siu_stream->buf_bytes,
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siu_stream->period_bytes))
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siu_stream->cur_period = 0;
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pr_debug("%s: done period #%d (%u/%u bytes), cookie %d\n",
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__func__, siu_stream->cur_period,
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siu_stream->cur_period * siu_stream->period_bytes,
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siu_stream->buf_bytes, siu_stream->cookie);
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queue_work(system_highpri_wq, &siu_stream->work);
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/* Notify alsa: a period is done */
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snd_pcm_period_elapsed(siu_stream->substream);
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}
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static int siu_pcm_wr_set(struct siu_port *port_info,
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dma_addr_t buff, u32 size)
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{
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struct siu_info *info = siu_i2s_data;
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u32 __iomem *base = info->reg;
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struct siu_stream *siu_stream = &port_info->playback;
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struct snd_pcm_substream *substream = siu_stream->substream;
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struct device *dev = substream->pcm->card->dev;
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struct dma_async_tx_descriptor *desc;
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dma_cookie_t cookie;
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struct scatterlist sg;
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u32 stfifo;
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sg_init_table(&sg, 1);
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sg_set_page(&sg, pfn_to_page(PFN_DOWN(buff)),
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size, offset_in_page(buff));
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sg_dma_len(&sg) = size;
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sg_dma_address(&sg) = buff;
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desc = dmaengine_prep_slave_sg(siu_stream->chan,
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&sg, 1, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!desc) {
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dev_err(dev, "Failed to allocate a dma descriptor\n");
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return -ENOMEM;
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}
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desc->callback = siu_dma_tx_complete;
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desc->callback_param = siu_stream;
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cookie = dmaengine_submit(desc);
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if (cookie < 0) {
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dev_err(dev, "Failed to submit a dma transfer\n");
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return cookie;
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}
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siu_stream->tx_desc = desc;
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siu_stream->cookie = cookie;
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dma_async_issue_pending(siu_stream->chan);
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/* only output FIFO enable */
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stfifo = siu_read32(base + SIU_STFIFO);
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siu_write32(base + SIU_STFIFO, stfifo | (port_info->stfifo & 0x0c180c18));
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dev_dbg(dev, "%s: STFIFO %x -> %x\n", __func__,
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stfifo, stfifo | (port_info->stfifo & 0x0c180c18));
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return 0;
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}
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static int siu_pcm_rd_set(struct siu_port *port_info,
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dma_addr_t buff, size_t size)
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{
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struct siu_info *info = siu_i2s_data;
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u32 __iomem *base = info->reg;
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struct siu_stream *siu_stream = &port_info->capture;
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struct snd_pcm_substream *substream = siu_stream->substream;
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struct device *dev = substream->pcm->card->dev;
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struct dma_async_tx_descriptor *desc;
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dma_cookie_t cookie;
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struct scatterlist sg;
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u32 stfifo;
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dev_dbg(dev, "%s: %u@%llx\n", __func__, size, (unsigned long long)buff);
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sg_init_table(&sg, 1);
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sg_set_page(&sg, pfn_to_page(PFN_DOWN(buff)),
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size, offset_in_page(buff));
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sg_dma_len(&sg) = size;
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sg_dma_address(&sg) = buff;
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desc = dmaengine_prep_slave_sg(siu_stream->chan,
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&sg, 1, DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!desc) {
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dev_err(dev, "Failed to allocate dma descriptor\n");
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return -ENOMEM;
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}
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desc->callback = siu_dma_tx_complete;
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desc->callback_param = siu_stream;
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cookie = dmaengine_submit(desc);
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if (cookie < 0) {
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dev_err(dev, "Failed to submit dma descriptor\n");
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return cookie;
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}
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siu_stream->tx_desc = desc;
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siu_stream->cookie = cookie;
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dma_async_issue_pending(siu_stream->chan);
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/* only input FIFO enable */
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stfifo = siu_read32(base + SIU_STFIFO);
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siu_write32(base + SIU_STFIFO, siu_read32(base + SIU_STFIFO) |
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(port_info->stfifo & 0x13071307));
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dev_dbg(dev, "%s: STFIFO %x -> %x\n", __func__,
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stfifo, stfifo | (port_info->stfifo & 0x13071307));
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return 0;
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}
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static void siu_io_work(struct work_struct *work)
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{
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struct siu_stream *siu_stream = container_of(work, struct siu_stream,
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work);
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struct snd_pcm_substream *substream = siu_stream->substream;
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struct device *dev = substream->pcm->card->dev;
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struct snd_pcm_runtime *rt = substream->runtime;
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struct siu_port *port_info = siu_port_info(substream);
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dev_dbg(dev, "%s: flags %x\n", __func__, siu_stream->rw_flg);
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if (!siu_stream->rw_flg) {
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dev_dbg(dev, "%s: stream inactive\n", __func__);
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return;
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}
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
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dma_addr_t buff;
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size_t count;
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buff = (dma_addr_t)PERIOD_OFFSET(rt->dma_addr,
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siu_stream->cur_period,
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siu_stream->period_bytes);
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count = siu_stream->period_bytes;
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/* DMA transfer start */
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siu_pcm_rd_set(port_info, buff, count);
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} else {
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siu_pcm_wr_set(port_info,
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(dma_addr_t)PERIOD_OFFSET(rt->dma_addr,
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siu_stream->cur_period,
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siu_stream->period_bytes),
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siu_stream->period_bytes);
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}
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}
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/* Capture */
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static int siu_pcm_stmread_start(struct siu_port *port_info)
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{
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struct siu_stream *siu_stream = &port_info->capture;
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if (siu_stream->xfer_cnt > 0x1000000)
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return -EINVAL;
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if (siu_stream->rw_flg)
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return -EPERM;
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/* Current period in buffer */
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siu_stream->cur_period = 0;
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/* during stmread flag set */
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siu_stream->rw_flg = RWF_STM_RD;
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queue_work(system_highpri_wq, &siu_stream->work);
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return 0;
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}
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static int siu_pcm_stmread_stop(struct siu_port *port_info)
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{
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struct siu_info *info = siu_i2s_data;
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u32 __iomem *base = info->reg;
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struct siu_stream *siu_stream = &port_info->capture;
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struct device *dev = siu_stream->substream->pcm->card->dev;
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u32 stfifo;
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if (!siu_stream->rw_flg)
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return -EPERM;
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/* input FIFO disable */
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stfifo = siu_read32(base + SIU_STFIFO);
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siu_write32(base + SIU_STFIFO, stfifo & ~0x13071307);
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dev_dbg(dev, "%s: STFIFO %x -> %x\n", __func__,
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stfifo, stfifo & ~0x13071307);
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/* during stmread flag clear */
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siu_stream->rw_flg = 0;
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return 0;
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}
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static bool filter(struct dma_chan *chan, void *secondary)
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{
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struct sh_dmae_slave *param = secondary;
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pr_debug("%s: secondary ID %d\n", __func__, param->shdma_slave.slave_id);
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chan->private = ¶m->shdma_slave;
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return true;
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}
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static int siu_pcm_open(struct snd_soc_component *component,
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struct snd_pcm_substream *ss)
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{
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/* Playback / Capture */
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struct siu_platform *pdata = component->dev->platform_data;
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struct siu_info *info = siu_i2s_data;
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struct siu_port *port_info = siu_port_info(ss);
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struct siu_stream *siu_stream;
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u32 port = info->port_id;
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struct device *dev = ss->pcm->card->dev;
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dma_cap_mask_t mask;
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struct sh_dmae_slave *param;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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dev_dbg(dev, "%s, port=%d@%p\n", __func__, port, port_info);
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if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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siu_stream = &port_info->playback;
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param = &siu_stream->param;
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param->shdma_slave.slave_id = port ? pdata->dma_slave_tx_b :
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pdata->dma_slave_tx_a;
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} else {
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siu_stream = &port_info->capture;
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param = &siu_stream->param;
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param->shdma_slave.slave_id = port ? pdata->dma_slave_rx_b :
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pdata->dma_slave_rx_a;
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}
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/* Get DMA channel */
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siu_stream->chan = dma_request_channel(mask, filter, param);
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if (!siu_stream->chan) {
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dev_err(dev, "DMA channel allocation failed!\n");
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return -EBUSY;
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}
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siu_stream->substream = ss;
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return 0;
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}
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static int siu_pcm_close(struct snd_soc_component *component,
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struct snd_pcm_substream *ss)
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{
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struct siu_info *info = siu_i2s_data;
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struct device *dev = ss->pcm->card->dev;
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struct siu_port *port_info = siu_port_info(ss);
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struct siu_stream *siu_stream;
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dev_dbg(dev, "%s: port=%d\n", __func__, info->port_id);
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if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
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siu_stream = &port_info->playback;
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else
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siu_stream = &port_info->capture;
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dma_release_channel(siu_stream->chan);
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siu_stream->chan = NULL;
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siu_stream->substream = NULL;
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return 0;
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}
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static int siu_pcm_prepare(struct snd_soc_component *component,
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struct snd_pcm_substream *ss)
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{
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struct siu_info *info = siu_i2s_data;
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struct siu_port *port_info = siu_port_info(ss);
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struct device *dev = ss->pcm->card->dev;
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struct snd_pcm_runtime *rt;
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struct siu_stream *siu_stream;
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snd_pcm_sframes_t xfer_cnt;
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if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
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siu_stream = &port_info->playback;
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else
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siu_stream = &port_info->capture;
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rt = siu_stream->substream->runtime;
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siu_stream->buf_bytes = snd_pcm_lib_buffer_bytes(ss);
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siu_stream->period_bytes = snd_pcm_lib_period_bytes(ss);
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dev_dbg(dev, "%s: port=%d, %d channels, period=%u bytes\n", __func__,
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info->port_id, rt->channels, siu_stream->period_bytes);
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/* We only support buffers that are multiples of the period */
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if (siu_stream->buf_bytes % siu_stream->period_bytes) {
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dev_err(dev, "%s() - buffer=%d not multiple of period=%d\n",
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__func__, siu_stream->buf_bytes,
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siu_stream->period_bytes);
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return -EINVAL;
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}
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xfer_cnt = bytes_to_frames(rt, siu_stream->period_bytes);
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if (!xfer_cnt || xfer_cnt > 0x1000000)
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return -EINVAL;
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siu_stream->format = rt->format;
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siu_stream->xfer_cnt = xfer_cnt;
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dev_dbg(dev, "port=%d buf=%lx buf_bytes=%d period_bytes=%d "
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"format=%d channels=%d xfer_cnt=%d\n", info->port_id,
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(unsigned long)rt->dma_addr, siu_stream->buf_bytes,
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siu_stream->period_bytes,
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siu_stream->format, rt->channels, (int)xfer_cnt);
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return 0;
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}
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static int siu_pcm_trigger(struct snd_soc_component *component,
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struct snd_pcm_substream *ss, int cmd)
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{
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struct siu_info *info = siu_i2s_data;
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struct device *dev = ss->pcm->card->dev;
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struct siu_port *port_info = siu_port_info(ss);
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int ret;
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dev_dbg(dev, "%s: port=%d@%p, cmd=%d\n", __func__,
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info->port_id, port_info, cmd);
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
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ret = siu_pcm_stmwrite_start(port_info);
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else
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ret = siu_pcm_stmread_start(port_info);
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if (ret < 0)
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dev_warn(dev, "%s: start failed on port=%d\n",
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__func__, info->port_id);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
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siu_pcm_stmwrite_stop(port_info);
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else
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siu_pcm_stmread_stop(port_info);
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ret = 0;
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break;
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default:
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dev_err(dev, "%s() unsupported cmd=%d\n", __func__, cmd);
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ret = -EINVAL;
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}
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return ret;
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}
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/*
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* So far only resolution of one period is supported, subject to extending the
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* dmangine API
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*/
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static snd_pcm_uframes_t
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siu_pcm_pointer_dma(struct snd_soc_component *component,
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struct snd_pcm_substream *ss)
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{
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struct device *dev = ss->pcm->card->dev;
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struct siu_info *info = siu_i2s_data;
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u32 __iomem *base = info->reg;
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struct siu_port *port_info = siu_port_info(ss);
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struct snd_pcm_runtime *rt = ss->runtime;
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size_t ptr;
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struct siu_stream *siu_stream;
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if (ss->stream == SNDRV_PCM_STREAM_PLAYBACK)
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siu_stream = &port_info->playback;
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else
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siu_stream = &port_info->capture;
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/*
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* ptr is the offset into the buffer where the dma is currently at. We
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* check if the dma buffer has just wrapped.
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*/
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ptr = PERIOD_OFFSET(rt->dma_addr,
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siu_stream->cur_period,
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siu_stream->period_bytes) - rt->dma_addr;
|
|
|
|
dev_dbg(dev,
|
|
"%s: port=%d, events %x, FSTS %x, xferred %u/%u, cookie %d\n",
|
|
__func__, info->port_id, siu_read32(base + SIU_EVNTC),
|
|
siu_read32(base + SIU_SBFSTS), ptr, siu_stream->buf_bytes,
|
|
siu_stream->cookie);
|
|
|
|
if (ptr >= siu_stream->buf_bytes)
|
|
ptr = 0;
|
|
|
|
return bytes_to_frames(ss->runtime, ptr);
|
|
}
|
|
|
|
static int siu_pcm_new(struct snd_soc_component *component,
|
|
struct snd_soc_pcm_runtime *rtd)
|
|
{
|
|
/* card->dev == socdev->dev, see snd_soc_new_pcms() */
|
|
struct snd_card *card = rtd->card->snd_card;
|
|
struct snd_pcm *pcm = rtd->pcm;
|
|
struct siu_info *info = siu_i2s_data;
|
|
struct platform_device *pdev = to_platform_device(card->dev);
|
|
int ret;
|
|
int i;
|
|
|
|
/* pdev->id selects between SIUA and SIUB */
|
|
if (pdev->id < 0 || pdev->id >= SIU_PORT_NUM)
|
|
return -EINVAL;
|
|
|
|
info->port_id = pdev->id;
|
|
|
|
/*
|
|
* While the siu has 2 ports, only one port can be on at a time (only 1
|
|
* SPB). So far all the boards using the siu had only one of the ports
|
|
* wired to a codec. To simplify things, we only register one port with
|
|
* alsa. In case both ports are needed, it should be changed here
|
|
*/
|
|
for (i = pdev->id; i < pdev->id + 1; i++) {
|
|
struct siu_port **port_info = &siu_ports[i];
|
|
|
|
ret = siu_init_port(i, port_info, card);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
snd_pcm_set_managed_buffer_all(pcm,
|
|
SNDRV_DMA_TYPE_DEV, card->dev,
|
|
SIU_BUFFER_BYTES_MAX, SIU_BUFFER_BYTES_MAX);
|
|
|
|
(*port_info)->pcm = pcm;
|
|
|
|
/* IO works */
|
|
INIT_WORK(&(*port_info)->playback.work, siu_io_work);
|
|
INIT_WORK(&(*port_info)->capture.work, siu_io_work);
|
|
}
|
|
|
|
dev_info(card->dev, "SuperH SIU driver initialized.\n");
|
|
return 0;
|
|
}
|
|
|
|
static void siu_pcm_free(struct snd_soc_component *component,
|
|
struct snd_pcm *pcm)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(pcm->card->dev);
|
|
struct siu_port *port_info = siu_ports[pdev->id];
|
|
|
|
cancel_work_sync(&port_info->capture.work);
|
|
cancel_work_sync(&port_info->playback.work);
|
|
|
|
siu_free_port(port_info);
|
|
|
|
dev_dbg(pcm->card->dev, "%s\n", __func__);
|
|
}
|
|
|
|
const struct snd_soc_component_driver siu_component = {
|
|
.name = DRV_NAME,
|
|
.open = siu_pcm_open,
|
|
.close = siu_pcm_close,
|
|
.prepare = siu_pcm_prepare,
|
|
.trigger = siu_pcm_trigger,
|
|
.pointer = siu_pcm_pointer_dma,
|
|
.pcm_construct = siu_pcm_new,
|
|
.pcm_destruct = siu_pcm_free,
|
|
};
|
|
EXPORT_SYMBOL_GPL(siu_component);
|