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a39cf72ceb
Convert superio_init to use PCI_FIXUP_FINAL as ohci_pci being called before superio_probe really makes a mess. superio_init will then fail to register irq 20 (the "SuperIO" irq) and BUG() because ohci_pci has stolen it before superio_fixup_irq can be moved USB to irq 1. Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
519 lines
14 KiB
C
519 lines
14 KiB
C
/* National Semiconductor NS87560UBD Super I/O controller used in
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* HP [BCJ]x000 workstations.
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*
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* This chip is a horrid piece of engineering, and National
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* denies any knowledge of its existence. Thus no datasheet is
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* available off www.national.com.
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*
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* (C) Copyright 2000 Linuxcare, Inc.
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* (C) Copyright 2000 Linuxcare Canada, Inc.
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* (C) Copyright 2000 Martin K. Petersen <mkp@linuxcare.com>
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* (C) Copyright 2000 Alex deVries <alex@onefishtwo.ca>
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* (C) Copyright 2001 John Marvin <jsm fc hp com>
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* (C) Copyright 2003 Grant Grundler <grundler parisc-linux org>
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* (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* The initial version of this is by Martin Peterson. Alex deVries
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* has spent a bit of time trying to coax it into working.
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*
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* Major changes to get basic interrupt infrastructure working to
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* hopefully be able to support all SuperIO devices. Currently
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* works with serial. -- John Marvin <jsm@fc.hp.com>
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*
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* Converted superio_init() to be a PCI_FIXUP_FINAL callee.
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* -- Kyle McMartin <kyle@parisc-linux.org>
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*/
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/* NOTES:
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*
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* Function 0 is an IDE controller. It is identical to a PC87415 IDE
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* controller (and identifies itself as such).
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*
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* Function 1 is a "Legacy I/O" controller. Under this function is a
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* whole mess of legacy I/O peripherals. Of course, HP hasn't enabled
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* all the functionality in hardware, but the following is available:
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*
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* Two 16550A compatible serial controllers
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* An IEEE 1284 compatible parallel port
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* A floppy disk controller
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*
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* Function 2 is a USB controller.
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*
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* We must be incredibly careful during initialization. Since all
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* interrupts are routed through function 1 (which is not allowed by
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* the PCI spec), we need to program the PICs on the legacy I/O port
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* *before* we attempt to set up IDE and USB. @#$!&
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*
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* According to HP, devices are only enabled by firmware if they have
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* a physical device connected.
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*
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* Configuration register bits:
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* 0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92
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* 0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM
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*
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*/
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/serial.h>
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#include <linux/pci.h>
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#include <linux/parport.h>
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#include <linux/parport_pc.h>
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#include <linux/termios.h>
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#include <linux/tty.h>
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#include <linux/serial_core.h>
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#include <linux/delay.h>
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#include <asm/io.h>
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#include <asm/hardware.h>
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#include <asm/superio.h>
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static struct superio_device sio_dev;
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#undef DEBUG_SUPERIO_INIT
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#ifdef DEBUG_SUPERIO_INIT
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#define DBG_INIT(x...) printk(x)
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#else
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#define DBG_INIT(x...)
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#endif
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static irqreturn_t
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superio_interrupt(int parent_irq, void *devp, struct pt_regs *regs)
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{
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u8 results;
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u8 local_irq;
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/* Poll the 8259 to see if there's an interrupt. */
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outb (OCW3_POLL,IC_PIC1+0);
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results = inb(IC_PIC1+0);
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/*
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* Bit 7: 1 = active Interrupt; 0 = no Interrupt pending
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* Bits 6-3: zero
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* Bits 2-0: highest priority, active requesting interrupt ID (0-7)
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*/
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if ((results & 0x80) == 0) {
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/* I suspect "spurious" interrupts are from unmasking an IRQ.
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* We don't know if an interrupt was/is pending and thus
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* just call the handler for that IRQ as if it were pending.
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*/
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return IRQ_NONE;
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}
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/* Check to see which device is interrupting */
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local_irq = results & 0x0f;
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if (local_irq == 2 || local_irq > 7) {
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printk(KERN_ERR "SuperIO: slave interrupted!\n");
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return IRQ_HANDLED;
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}
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if (local_irq == 7) {
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/* Could be spurious. Check in service bits */
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outb(OCW3_ISR,IC_PIC1+0);
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results = inb(IC_PIC1+0);
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if ((results & 0x80) == 0) { /* if ISR7 not set: spurious */
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printk(KERN_WARNING "SuperIO: spurious interrupt!\n");
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return IRQ_HANDLED;
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}
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}
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/* Call the appropriate device's interrupt */
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__do_IRQ(local_irq, regs);
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/* set EOI - forces a new interrupt if a lower priority device
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* still needs service.
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*/
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outb((OCW2_SEOI|local_irq),IC_PIC1 + 0);
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return IRQ_HANDLED;
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}
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/* Initialize Super I/O device */
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static void
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superio_init(struct pci_dev *pcidev)
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{
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struct superio_device *sio = &sio_dev;
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struct pci_dev *pdev = sio->lio_pdev;
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u16 word;
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if (sio->suckyio_irq_enabled)
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return;
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if (!pdev) BUG();
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if (!sio->usb_pdev) BUG();
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/* use the IRQ iosapic found for USB INT D... */
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pdev->irq = sio->usb_pdev->irq;
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/* ...then properly fixup the USB to point at suckyio PIC */
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sio->usb_pdev->irq = superio_fixup_irq(sio->usb_pdev);
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printk(KERN_INFO "SuperIO: Found NS87560 Legacy I/O device at %s (IRQ %i) \n",
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pci_name(pdev), pdev->irq);
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pci_read_config_dword (pdev, SIO_SP1BAR, &sio->sp1_base);
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sio->sp1_base &= ~1;
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printk (KERN_INFO "SuperIO: Serial port 1 at 0x%x\n", sio->sp1_base);
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pci_read_config_dword (pdev, SIO_SP2BAR, &sio->sp2_base);
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sio->sp2_base &= ~1;
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printk (KERN_INFO "SuperIO: Serial port 2 at 0x%x\n", sio->sp2_base);
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pci_read_config_dword (pdev, SIO_PPBAR, &sio->pp_base);
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sio->pp_base &= ~1;
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printk (KERN_INFO "SuperIO: Parallel port at 0x%x\n", sio->pp_base);
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pci_read_config_dword (pdev, SIO_FDCBAR, &sio->fdc_base);
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sio->fdc_base &= ~1;
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printk (KERN_INFO "SuperIO: Floppy controller at 0x%x\n", sio->fdc_base);
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pci_read_config_dword (pdev, SIO_ACPIBAR, &sio->acpi_base);
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sio->acpi_base &= ~1;
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printk (KERN_INFO "SuperIO: ACPI at 0x%x\n", sio->acpi_base);
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request_region (IC_PIC1, 0x1f, "pic1");
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request_region (IC_PIC2, 0x1f, "pic2");
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request_region (sio->acpi_base, 0x1f, "acpi");
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/* Enable the legacy I/O function */
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pci_read_config_word (pdev, PCI_COMMAND, &word);
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word |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_IO;
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pci_write_config_word (pdev, PCI_COMMAND, word);
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pci_set_master (pdev);
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pci_enable_device(pdev);
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/*
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* Next project is programming the onboard interrupt controllers.
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* PDC hasn't done this for us, since it's using polled I/O.
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*
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* XXX Use dword writes to avoid bugs in Elroy or Suckyio Config
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* space access. PCI is by nature a 32-bit bus and config
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* space can be sensitive to that.
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*/
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/* 0x64 - 0x67 :
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DMA Rtg 2
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DMA Rtg 3
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DMA Chan Ctl
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TRIGGER_1 == 0x82 USB & IDE level triggered, rest to edge
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*/
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pci_write_config_dword (pdev, 0x64, 0x82000000U);
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/* 0x68 - 0x6b :
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TRIGGER_2 == 0x00 all edge triggered (not used)
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CFG_IR_SER == 0x43 SerPort1 = IRQ3, SerPort2 = IRQ4
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CFG_IR_PF == 0x65 ParPort = IRQ5, FloppyCtlr = IRQ6
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CFG_IR_IDE == 0x07 IDE1 = IRQ7, reserved
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*/
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pci_write_config_dword (pdev, TRIGGER_2, 0x07654300U);
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/* 0x6c - 0x6f :
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CFG_IR_INTAB == 0x00
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CFG_IR_INTCD == 0x10 USB = IRQ1
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CFG_IR_PS2 == 0x00
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CFG_IR_FXBUS == 0x00
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*/
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pci_write_config_dword (pdev, CFG_IR_INTAB, 0x00001000U);
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/* 0x70 - 0x73 :
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CFG_IR_USB == 0x00 not used. USB is connected to INTD.
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CFG_IR_ACPI == 0x00 not used.
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DMA Priority == 0x4c88 Power on default value. NFC.
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*/
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pci_write_config_dword (pdev, CFG_IR_USB, 0x4c880000U);
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/* PIC1 Initialization Command Word register programming */
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outb (0x11,IC_PIC1+0); /* ICW1: ICW4 write req | ICW1 */
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outb (0x00,IC_PIC1+1); /* ICW2: interrupt vector table - not used */
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outb (0x04,IC_PIC1+1); /* ICW3: Cascade */
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outb (0x01,IC_PIC1+1); /* ICW4: x86 mode */
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/* PIC1 Program Operational Control Words */
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outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
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outb (0xc2,IC_PIC1+0); /* OCW2: priority (3-7,0-2) */
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/* PIC2 Initialization Command Word register programming */
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outb (0x11,IC_PIC2+0); /* ICW1: ICW4 write req | ICW1 */
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outb (0x00,IC_PIC2+1); /* ICW2: N/A */
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outb (0x02,IC_PIC2+1); /* ICW3: Slave ID code */
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outb (0x01,IC_PIC2+1); /* ICW4: x86 mode */
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/* Program Operational Control Words */
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outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
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outb (0x68,IC_PIC1+0); /* OCW3: OCW3 select | ESMM | SMM */
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/* Write master mask reg */
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outb (0xff,IC_PIC1+1);
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/* Setup USB power regulation */
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outb(1, sio->acpi_base + USB_REG_CR);
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if (inb(sio->acpi_base + USB_REG_CR) & 1)
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printk(KERN_INFO "SuperIO: USB regulator enabled\n");
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else
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printk(KERN_ERR "USB regulator not initialized!\n");
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if (request_irq(pdev->irq, superio_interrupt, SA_INTERRUPT,
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"SuperIO", (void *)sio)) {
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printk(KERN_ERR "SuperIO: could not get irq\n");
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BUG();
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return;
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}
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sio->suckyio_irq_enabled = 1;
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO, superio_init);
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static void superio_disable_irq(unsigned int irq)
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{
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u8 r8;
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if ((irq < 1) || (irq == 2) || (irq > 7)) {
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printk(KERN_ERR "SuperIO: Illegal irq number.\n");
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BUG();
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return;
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}
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/* Mask interrupt */
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r8 = inb(IC_PIC1+1);
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r8 |= (1 << irq);
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outb (r8,IC_PIC1+1);
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}
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static void superio_enable_irq(unsigned int irq)
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{
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u8 r8;
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if ((irq < 1) || (irq == 2) || (irq > 7)) {
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printk(KERN_ERR "SuperIO: Illegal irq number (%d).\n", irq);
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BUG();
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return;
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}
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/* Unmask interrupt */
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r8 = inb(IC_PIC1+1);
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r8 &= ~(1 << irq);
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outb (r8,IC_PIC1+1);
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}
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static unsigned int superio_startup_irq(unsigned int irq)
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{
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superio_enable_irq(irq);
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return 0;
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}
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static struct hw_interrupt_type superio_interrupt_type = {
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.typename = "SuperIO",
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.startup = superio_startup_irq,
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.shutdown = superio_disable_irq,
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.enable = superio_enable_irq,
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.disable = superio_disable_irq,
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.ack = no_ack_irq,
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.end = no_end_irq,
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};
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#ifdef DEBUG_SUPERIO_INIT
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static unsigned short expected_device[3] = {
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PCI_DEVICE_ID_NS_87415,
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PCI_DEVICE_ID_NS_87560_LIO,
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PCI_DEVICE_ID_NS_87560_USB
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};
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#endif
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int superio_fixup_irq(struct pci_dev *pcidev)
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{
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int local_irq, i;
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#ifdef DEBUG_SUPERIO_INIT
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int fn;
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fn = PCI_FUNC(pcidev->devfn);
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/* Verify the function number matches the expected device id. */
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if (expected_device[fn] != pcidev->device) {
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BUG();
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return -1;
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}
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printk("superio_fixup_irq(%s) ven 0x%x dev 0x%x from %p\n",
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pci_name(pcidev),
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pcidev->vendor, pcidev->device,
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__builtin_return_address(0));
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#endif
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for (i = 0; i < 16; i++) {
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irq_desc[i].handler = &superio_interrupt_type;
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}
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/*
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* We don't allocate a SuperIO irq for the legacy IO function,
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* since it is a "bridge". Instead, we will allocate irq's for
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* each legacy device as they are initialized.
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*/
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switch(pcidev->device) {
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case PCI_DEVICE_ID_NS_87415: /* Function 0 */
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local_irq = IDE_IRQ;
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break;
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case PCI_DEVICE_ID_NS_87560_LIO: /* Function 1 */
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sio_dev.lio_pdev = pcidev; /* save for superio_init() */
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return -1;
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case PCI_DEVICE_ID_NS_87560_USB: /* Function 2 */
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sio_dev.usb_pdev = pcidev; /* save for superio_init() */
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local_irq = USB_IRQ;
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break;
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default:
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local_irq = -1;
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BUG();
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break;
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}
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return local_irq;
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}
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static struct uart_port serial[] = {
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{
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.iotype = UPIO_PORT,
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.line = 0,
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.type = PORT_16550A,
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.uartclk = 115200*16,
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.fifosize = 16,
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},
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{
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.iotype = UPIO_PORT,
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.line = 1,
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.type = PORT_16550A,
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.uartclk = 115200*16,
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.fifosize = 16,
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}
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};
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static void __devinit superio_serial_init(void)
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{
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#ifdef CONFIG_SERIAL_8250
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int retval;
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serial[0].iobase = sio_dev.sp1_base;
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serial[0].irq = SP1_IRQ;
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spin_lock_init(&serial[0].lock);
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retval = early_serial_setup(&serial[0]);
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if (retval < 0) {
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printk(KERN_WARNING "SuperIO: Register Serial #0 failed.\n");
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return;
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}
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serial[1].iobase = sio_dev.sp2_base;
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serial[1].irq = SP2_IRQ;
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spin_lock_init(&serial[1].lock);
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retval = early_serial_setup(&serial[1]);
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if (retval < 0)
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printk(KERN_WARNING "SuperIO: Register Serial #1 failed.\n");
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#endif /* CONFIG_SERIAL_8250 */
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}
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static void __devinit superio_parport_init(void)
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{
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#ifdef CONFIG_PARPORT_PC
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if (!parport_pc_probe_port(sio_dev.pp_base,
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0 /*base_hi*/,
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PAR_IRQ,
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PARPORT_DMA_NONE /* dma */,
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NULL /*struct pci_dev* */) )
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printk(KERN_WARNING "SuperIO: Probing parallel port failed.\n");
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#endif /* CONFIG_PARPORT_PC */
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}
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static void superio_fixup_pci(struct pci_dev *pdev)
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{
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u8 prog;
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pdev->class |= 0x5;
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pci_write_config_byte(pdev, PCI_CLASS_PROG, pdev->class);
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pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
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printk("PCI: Enabled native mode for NS87415 (pif=0x%x)\n", prog);
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}
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, superio_fixup_pci);
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static int __devinit
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superio_probe(struct pci_dev *dev, const struct pci_device_id *id)
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{
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struct superio_device *sio = &sio_dev;
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/*
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** superio_probe(00:0e.0) ven 0x100b dev 0x2 sv 0x0 sd 0x0 class 0x1018a
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** superio_probe(00:0e.1) ven 0x100b dev 0xe sv 0x0 sd 0x0 class 0x68000
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** superio_probe(00:0e.2) ven 0x100b dev 0x12 sv 0x0 sd 0x0 class 0xc0310
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*/
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DBG_INIT("superio_probe(%s) ven 0x%x dev 0x%x sv 0x%x sd 0x%x class 0x%x\n",
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pci_name(dev),
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dev->vendor, dev->device,
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dev->subsystem_vendor, dev->subsystem_device,
|
|
dev->class);
|
|
|
|
if (!sio->suckyio_irq_enabled)
|
|
BUG(); /* Enabled by PCI_FIXUP_FINAL */
|
|
|
|
if (dev->device == PCI_DEVICE_ID_NS_87560_LIO) { /* Function 1 */
|
|
superio_parport_init();
|
|
superio_serial_init();
|
|
/* REVISIT XXX : superio_fdc_init() ? */
|
|
return 0;
|
|
} else if (dev->device == PCI_DEVICE_ID_NS_87415) { /* Function 0 */
|
|
DBG_INIT("superio_probe: ignoring IDE 87415\n");
|
|
} else if (dev->device == PCI_DEVICE_ID_NS_87560_USB) { /* Function 2 */
|
|
DBG_INIT("superio_probe: ignoring USB OHCI controller\n");
|
|
} else {
|
|
DBG_INIT("superio_probe: WTF? Fire Extinguisher?\n");
|
|
}
|
|
|
|
/* Let appropriate other driver claim this device. */
|
|
return -ENODEV;
|
|
}
|
|
|
|
static struct pci_device_id superio_tbl[] = {
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO) },
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_USB) },
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415) },
|
|
{ 0, }
|
|
};
|
|
|
|
static struct pci_driver superio_driver = {
|
|
.name = "SuperIO",
|
|
.id_table = superio_tbl,
|
|
.probe = superio_probe,
|
|
};
|
|
|
|
static int __init superio_modinit(void)
|
|
{
|
|
return pci_register_driver(&superio_driver);
|
|
}
|
|
|
|
static void __exit superio_exit(void)
|
|
{
|
|
pci_unregister_driver(&superio_driver);
|
|
}
|
|
|
|
module_init(superio_modinit);
|
|
module_exit(superio_exit);
|