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3744b5280e
To perform the kexec relocation with the MMU enabled, we need a copy of the linear map. Create one, and install it from the relocation code. This has to be done from the assembly code as it will be idmapped with TTBR0. The kernel runs in TTRB1, so can't use the break-before-make sequence on the mapping it is executing from. The makes no difference yet as the relocation code runs with the MMU disabled. Suggested-by: James Morse <james.morse@arm.com> Signed-off-by: Pasha Tatashin <pasha.tatashin@soleen.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20210930143113.1502553-12-pasha.tatashin@soleen.com Signed-off-by: Will Deacon <will@kernel.org>
96 lines
2.8 KiB
ArmAsm
96 lines
2.8 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Hibernate low-level support
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*
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* Copyright (C) 2016 ARM Ltd.
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* Author: James Morse <james.morse@arm.com>
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*/
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#include <linux/linkage.h>
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#include <linux/errno.h>
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#include <asm/asm-offsets.h>
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#include <asm/assembler.h>
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#include <asm/cputype.h>
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#include <asm/memory.h>
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#include <asm/page.h>
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#include <asm/virt.h>
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/*
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* Resume from hibernate
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*
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* Loads temporary page tables then restores the memory image.
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* Finally branches to cpu_resume() to restore the state saved by
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* swsusp_arch_suspend().
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*
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* Because this code has to be copied to a 'safe' page, it can't call out to
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* other functions by PC-relative address. Also remember that it may be
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* mid-way through over-writing other functions. For this reason it contains
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* code from caches_clean_inval_pou() and uses the copy_page() macro.
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*
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* This 'safe' page is mapped via ttbr0, and executed from there. This function
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* switches to a copy of the linear map in ttbr1, performs the restore, then
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* switches ttbr1 to the original kernel's swapper_pg_dir.
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*
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* All of memory gets written to, including code. We need to clean the kernel
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* text to the Point of Coherence (PoC) before secondary cores can be booted.
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* Because the kernel modules and executable pages mapped to user space are
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* also written as data, we clean all pages we touch to the Point of
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* Unification (PoU).
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*
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* x0: physical address of temporary page tables
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* x1: physical address of swapper page tables
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* x2: address of cpu_resume
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* x3: linear map address of restore_pblist in the current kernel
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* x4: physical address of __hyp_stub_vectors, or 0
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* x5: physical address of a zero page that remains zero after resume
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*/
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.pushsection ".hibernate_exit.text", "ax"
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SYM_CODE_START(swsusp_arch_suspend_exit)
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/*
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* We execute from ttbr0, change ttbr1 to our copied linear map tables
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* with a break-before-make via the zero page
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*/
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break_before_make_ttbr_switch x5, x0, x6, x8
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mov x21, x1
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mov x30, x2
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mov x24, x4
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mov x25, x5
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/* walk the restore_pblist and use copy_page() to over-write memory */
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mov x19, x3
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1: ldr x10, [x19, #HIBERN_PBE_ORIG]
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mov x0, x10
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ldr x1, [x19, #HIBERN_PBE_ADDR]
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copy_page x0, x1, x2, x3, x4, x5, x6, x7, x8, x9
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add x1, x10, #PAGE_SIZE
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/* Clean the copied page to PoU - based on caches_clean_inval_pou() */
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raw_dcache_line_size x2, x3
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sub x3, x2, #1
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bic x4, x10, x3
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2: /* clean D line / unified line */
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alternative_insn "dc cvau, x4", "dc civac, x4", ARM64_WORKAROUND_CLEAN_CACHE
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add x4, x4, x2
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cmp x4, x1
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b.lo 2b
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ldr x19, [x19, #HIBERN_PBE_NEXT]
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cbnz x19, 1b
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dsb ish /* wait for PoU cleaning to finish */
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/* switch to the restored kernels page tables */
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break_before_make_ttbr_switch x25, x21, x6, x8
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ic ialluis
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dsb ish
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isb
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cbz x24, 3f /* Do we need to re-initialise EL2? */
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hvc #0
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3: ret
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SYM_CODE_END(swsusp_arch_suspend_exit)
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.popsection
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