Andy Shevchenko c24a5c735f dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width" ... The commit 080edf75d3 ("dmaengine: hsu: set HSU_CH_MTSR to memory width") has been mistakenly submitted. The further investigations show that the original code does better job since the memory side transfer size has never been configured by DMA users. As per latest revision of documentation: "Channel minimum transfer size (CHnMTSR)... For IOSF UART, maximum value that can be programmed is 64 and minimum value that can be programmed is 1." This reverts commit 080edf75d3. Fixes: 080edf75d3 ("dmaengine: hsu: set HSU_CH_MTSR to memory width") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>		2019-06-25 09:57:41 +05:30
..
hsu.c	dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width"	2019-06-25 09:57:41 +05:30
hsu.h	dmaengine updates for 4.7	2016-05-19 11:47:18 -07:00
Kconfig	dmaengine: hsu: make the UART driver in control of selecting this driver	2015-10-17 21:22:08 -07:00
Makefile
pci.c	serial: 8250_mid: handle interrupt correctly in DMA case	2017-01-19 14:20:23 +01:00