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Venice2 uses the MAX98090 audio CODEC, and supports built-in speakers, and a combo headphones/microphone jack. Add a top-level sound card node to represent this. Signed-off-by: Stephen Warren <swarren@nvidia.com>
113 lines
2.1 KiB
Plaintext
113 lines
2.1 KiB
Plaintext
/dts-v1/;
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#include "tegra124.dtsi"
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/ {
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model = "NVIDIA Tegra124 Venice2";
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compatible = "nvidia,venice2", "nvidia,tegra124";
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memory {
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reg = <0x80000000 0x80000000>;
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};
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serial@70006000 {
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status = "okay";
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};
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i2c@7000c000 {
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status = "okay";
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clock-frequency = <100000>;
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acodec: audio-codec@10 {
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compatible = "maxim,max98090";
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reg = <0x10>;
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interrupt-parent = <&gpio>;
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interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
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};
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};
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i2c@7000c400 {
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status = "okay";
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clock-frequency = <100000>;
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};
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i2c@7000c500 {
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status = "okay";
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clock-frequency = <100000>;
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};
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i2c@7000c700 {
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status = "okay";
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clock-frequency = <100000>;
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};
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i2c@7000d000 {
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status = "okay";
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clock-frequency = <100000>;
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};
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pmc@7000e400 {
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nvidia,invert-interrupt;
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nvidia,suspend-mode = <1>;
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nvidia,cpu-pwr-good-time = <500>;
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nvidia,cpu-pwr-off-time = <300>;
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nvidia,core-pwr-good-time = <641 3845>;
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nvidia,core-pwr-off-time = <61036>;
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nvidia,core-power-req-active-high;
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nvidia,sys-clock-req-active-high;
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};
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sdhci@700b0400 {
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cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
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power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
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status = "okay";
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bus-width = <4>;
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};
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sdhci@700b0600 {
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status = "okay";
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bus-width = <8>;
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};
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ahub@70300000 {
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i2s@70301100 {
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status = "okay";
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};
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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clk32k_in: clock@0 {
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compatible = "fixed-clock";
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reg=<0>;
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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};
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sound {
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compatible = "nvidia,tegra-audio-max98090-venice2",
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"nvidia,tegra-audio-max98090";
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nvidia,model = "NVIDIA Tegra Venice2";
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nvidia,audio-routing =
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"Headphones", "HPR",
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"Headphones", "HPL",
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"Speakers", "SPKR",
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"Speakers", "SPKL",
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"Mic Jack", "MICBIAS",
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"IN34", "Mic Jack";
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nvidia,i2s-controller = <&tegra_i2s1>;
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nvidia,audio-codec = <&acodec>;
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clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
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<&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
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<&tegra_car TEGRA124_CLK_EXTERN1>;
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clock-names = "pll_a", "pll_a_out0", "mclk";
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};
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};
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