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3e24b05ba3
FEC controller is connected to AIPI2 bus. Also fix the AIPI1 address range. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
74 lines
1.3 KiB
Plaintext
74 lines
1.3 KiB
Plaintext
/*
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* Copyright 2012 Sascha Hauer, Pengutronix
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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/include/ "imx27.dtsi"
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/ {
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model = "Phytec pcm038";
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compatible = "phytec,imx27-pcm038", "fsl,imx27";
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memory {
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reg = <0x0 0x0>;
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};
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soc {
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aipi@10000000 { /* aipi1 */
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serial@1000a000 {
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fsl,uart-has-rtscts;
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status = "okay";
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};
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serial@1000b000 {
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fsl,uart-has-rtscts;
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status = "okay";
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};
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serial@1000c000 {
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fsl,uart-has-rtscts;
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status = "okay";
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};
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i2c@1001d000 {
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clock-frequency = <400000>;
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status = "okay";
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at24@52 {
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compatible = "at,24c32";
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pagesize = <32>;
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reg = <0x52>;
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};
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pcf8563@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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};
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lm75@4a {
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compatible = "national,lm75";
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reg = <0x4a>;
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};
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};
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};
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aipi@10020000 { /* aipi2 */
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ethernet@1002b000 {
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status = "okay";
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};
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};
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};
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nor_flash@c0000000 {
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compatible = "cfi-flash";
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bank-width = <2>;
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reg = <0xc0000000 0x02000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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