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d6a4f70909
On PowerNV platforms, when a CPU is offline, we put it into nap mode. It's possible that the CPU wakes up from nap mode while it is still offline due to a stray IPI. A misdirected device interrupt could also potentially cause it to wake up. In that circumstance, we need to clear the interrupt so that the CPU can go back to nap mode. In the past the clearing of the interrupt was accomplished by briefly enabling interrupts and allowing the normal interrupt handling code (do_IRQ() etc.) to handle the interrupt. This has the problem that this code calls irq_enter() and irq_exit(), which call functions such as account_system_vtime() which use RCU internally. Use of RCU is not permitted on offline CPUs and will trigger errors if RCU checking is enabled. To avoid calling into any generic code which might use RCU, we adopt a different method of clearing interrupts on offline CPUs. Since we are on the PowerNV platform, we know that the system interrupt controller is a XICS being driven directly (i.e. not via hcalls) by the kernel. Hence this adds a new icp_native_flush_interrupt() function to the native-mode XICS driver and arranges to call that when an offline CPU is woken from nap. This new function reads the interrupt from the XICS. If it is an IPI, it clears the IPI; if it is a device interrupt, it prints a warning and disables the source. Then it does the end-of-interrupt processing for the interrupt. The other thing that briefly enabling interrupts did was to check and clear the irq_happened flag in this CPU's PACA. Therefore, after flushing the interrupt from the XICS, we also clear all bits except the PACA_IRQ_HARD_DIS (interrupts are hard disabled) bit from the irq_happened flag. The PACA_IRQ_HARD_DIS flag is set by power7_nap() and is left set to indicate that interrupts are hard disabled. This means we then have to ignore that flag in power7_nap(), which is reasonable since it doesn't indicate that any interrupt event needs servicing. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
222 lines
5.4 KiB
C
222 lines
5.4 KiB
C
/*
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* SMP support for PowerNV machines.
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*
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* Copyright 2011 IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/cpu.h>
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#include <asm/irq.h>
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#include <asm/smp.h>
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#include <asm/paca.h>
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#include <asm/machdep.h>
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#include <asm/cputable.h>
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#include <asm/firmware.h>
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#include <asm/rtas.h>
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#include <asm/vdso_datapage.h>
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#include <asm/cputhreads.h>
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#include <asm/xics.h>
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#include <asm/opal.h>
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#include <asm/runlatch.h>
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#include <asm/code-patching.h>
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#include <asm/dbell.h>
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#include "powernv.h"
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#ifdef DEBUG
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#include <asm/udbg.h>
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#define DBG(fmt...) udbg_printf(fmt)
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#else
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#define DBG(fmt...)
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#endif
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static void pnv_smp_setup_cpu(int cpu)
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{
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if (cpu != boot_cpuid)
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xics_setup_cpu();
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#ifdef CONFIG_PPC_DOORBELL
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if (cpu_has_feature(CPU_FTR_DBELL))
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doorbell_setup_this_cpu();
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#endif
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}
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static int pnv_smp_kick_cpu(int nr)
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{
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unsigned int pcpu = get_hard_smp_processor_id(nr);
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unsigned long start_here =
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__pa(ppc_function_entry(generic_secondary_smp_init));
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long rc;
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BUG_ON(nr < 0 || nr >= NR_CPUS);
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/*
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* If we already started or OPALv2 is not supported, we just
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* kick the CPU via the PACA
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*/
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if (paca[nr].cpu_start || !firmware_has_feature(FW_FEATURE_OPALv2))
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goto kick;
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/*
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* At this point, the CPU can either be spinning on the way in
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* from kexec or be inside OPAL waiting to be started for the
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* first time. OPAL v3 allows us to query OPAL to know if it
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* has the CPUs, so we do that
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*/
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if (firmware_has_feature(FW_FEATURE_OPALv3)) {
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uint8_t status;
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rc = opal_query_cpu_status(pcpu, &status);
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if (rc != OPAL_SUCCESS) {
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pr_warn("OPAL Error %ld querying CPU %d state\n",
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rc, nr);
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return -ENODEV;
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}
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/*
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* Already started, just kick it, probably coming from
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* kexec and spinning
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*/
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if (status == OPAL_THREAD_STARTED)
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goto kick;
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/*
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* Available/inactive, let's kick it
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*/
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if (status == OPAL_THREAD_INACTIVE) {
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pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n",
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nr, pcpu);
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rc = opal_start_cpu(pcpu, start_here);
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if (rc != OPAL_SUCCESS) {
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pr_warn("OPAL Error %ld starting CPU %d\n",
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rc, nr);
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return -ENODEV;
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}
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} else {
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/*
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* An unavailable CPU (or any other unknown status)
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* shouldn't be started. It should also
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* not be in the possible map but currently it can
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* happen
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*/
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pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable"
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" (status %d)...\n", nr, pcpu, status);
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return -ENODEV;
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}
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} else {
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/*
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* On OPAL v2, we just kick it and hope for the best,
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* we must not test the error from opal_start_cpu() or
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* we would fail to get CPUs from kexec.
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*/
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opal_start_cpu(pcpu, start_here);
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}
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kick:
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return smp_generic_kick_cpu(nr);
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static int pnv_smp_cpu_disable(void)
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{
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int cpu = smp_processor_id();
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/* This is identical to pSeries... might consolidate by
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* moving migrate_irqs_away to a ppc_md with default to
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* the generic fixup_irqs. --BenH.
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*/
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set_cpu_online(cpu, false);
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vdso_data->processorCount--;
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if (cpu == boot_cpuid)
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boot_cpuid = cpumask_any(cpu_online_mask);
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xics_migrate_irqs_away();
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return 0;
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}
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static void pnv_smp_cpu_kill_self(void)
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{
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unsigned int cpu;
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/* Standard hot unplug procedure */
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local_irq_disable();
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idle_task_exit();
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current->active_mm = NULL; /* for sanity */
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cpu = smp_processor_id();
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DBG("CPU%d offline\n", cpu);
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generic_set_cpu_dead(cpu);
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smp_wmb();
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/* We don't want to take decrementer interrupts while we are offline,
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* so clear LPCR:PECE1. We keep PECE2 enabled.
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*/
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mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
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while (!generic_check_cpu_restart(cpu)) {
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ppc64_runlatch_off();
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power7_nap(1);
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ppc64_runlatch_on();
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/* Clear the IPI that woke us up */
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icp_native_flush_interrupt();
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local_paca->irq_happened &= PACA_IRQ_HARD_DIS;
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mb();
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if (cpu_core_split_required())
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continue;
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if (!generic_check_cpu_restart(cpu))
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DBG("CPU%d Unexpected exit while offline !\n", cpu);
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}
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mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_PECE1);
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DBG("CPU%d coming online...\n", cpu);
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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static struct smp_ops_t pnv_smp_ops = {
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.message_pass = smp_muxed_ipi_message_pass,
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.cause_ipi = NULL, /* Filled at runtime by xics_smp_probe() */
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.probe = xics_smp_probe,
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.kick_cpu = pnv_smp_kick_cpu,
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.setup_cpu = pnv_smp_setup_cpu,
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.cpu_bootable = smp_generic_cpu_bootable,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_disable = pnv_smp_cpu_disable,
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.cpu_die = generic_cpu_die,
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#endif /* CONFIG_HOTPLUG_CPU */
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};
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/* This is called very early during platform setup_arch */
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void __init pnv_smp_init(void)
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{
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smp_ops = &pnv_smp_ops;
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/* XXX We don't yet have a proper entry point from HAL, for
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* now we rely on kexec-style entry from BML
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*/
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#ifdef CONFIG_PPC_RTAS
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/* Non-lpar has additional take/give timebase */
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if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
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smp_ops->give_timebase = rtas_give_timebase;
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smp_ops->take_timebase = rtas_take_timebase;
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}
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#endif /* CONFIG_PPC_RTAS */
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#ifdef CONFIG_HOTPLUG_CPU
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ppc_md.cpu_die = pnv_smp_cpu_kill_self;
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#endif
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}
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