mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-29 05:55:02 +08:00
3edad321b1
Marvell EBU SoCs such as Armada 370/XP, Orion5x (88f5xxx) and Discovery (mv78xx0) supports a Device Bus controller to access several kinds of memories and I/O devices (NOR, NAND, SRAM, FPGA). This commit adds a driver to handle this controller. So far only Armada 370, Armada XP and Discovery SoCs are supported. The driver must be registered through a device tree node; as explained in the binding document. For each child node in the device tree, this driver will: * set timing parameters * register a child device * setup an address decoding window, using the mbus driver Keep in mind the address decoding window setup is only a temporary hack. This code will be removed from this devbus driver as soon as a proper device tree binding for the mbus driver is added. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
12 lines
257 B
Makefile
12 lines
257 B
Makefile
#
|
|
# Makefile for memory devices
|
|
#
|
|
|
|
ifeq ($(CONFIG_DDR),y)
|
|
obj-$(CONFIG_OF) += of_memory.o
|
|
endif
|
|
obj-$(CONFIG_TI_EMIF) += emif.o
|
|
obj-$(CONFIG_MVEBU_DEVBUS) += mvebu-devbus.o
|
|
obj-$(CONFIG_TEGRA20_MC) += tegra20-mc.o
|
|
obj-$(CONFIG_TEGRA30_MC) += tegra30-mc.o
|