linux/arch/riscv/mm
Kefeng Wang aec33b54af
riscv: Covert to reserve_initrd_mem()
Covert to the generic reserve_initrd_mem() function.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-02-18 23:17:58 -08:00
..
cacheflush.c mm: reorder includes after introduction of linux/pgtable.h 2020-06-09 09:39:13 -07:00
context.c riscv: add nommu support 2019-11-17 15:17:39 -08:00
extable.c riscv: abstract out CSR names for supervisor vs machine mode 2019-11-05 09:20:42 -08:00
fault.c riscv: Add uprobes supported 2021-01-14 15:09:08 -08:00
hugetlbpage.c hugetlbfs: remove hugetlb_add_hstate() warning for existing hstate 2020-06-03 20:09:46 -07:00
init.c riscv: Covert to reserve_initrd_mem() 2021-02-18 23:17:58 -08:00
kasan_init.c arch, drivers: replace for_each_membock() with for_each_mem_range() 2020-10-13 18:38:35 -07:00
Makefile riscv: Fixup patch_text panic in ftrace 2021-01-14 15:09:04 -08:00
pageattr.c RISC-V Patches for the 5.11 Merge Window, Part 1 2020-12-18 10:43:07 -08:00
physaddr.c riscv: mm: add support for CONFIG_DEBUG_VIRTUAL 2020-01-23 10:40:06 -08:00
ptdump.c RISC-V: Add page table dump support for uefi 2020-10-02 14:31:33 -07:00
tlbflush.c RISC-V: Issue a tlb page flush if possible 2019-10-29 11:32:18 -07:00