linux/drivers/gpu/drm/sun4i
Giulio Benetti 67f4aeb2b4
drm/sun4i: tcon: fix inverted DCLK polarity
During commit 88bc417856 ("drm: Use new
DRM_BUS_FLAG_*_(DRIVE|SAMPLE)_(POS|NEG)EDGE flags") DRM_BUS_FLAG_*
macros have been changed to avoid ambiguity but just because of this
ambiguity previous DRM_BUS_FLAG_PIXDATA_(POS/NEG)EDGE were used meaning
_SAMPLE_ not _DRIVE_. This leads to DLCK inversion and need to fix but
instead of swapping phase values, let's adopt an easier approach Maxime
suggested:
It turned out that bit 26 of SUN4I_TCON0_IO_POL_REG is dedicated to
invert DCLK polarity and this makes things really easier than before. So
let's handle DCLK polarity by adding SUN4I_TCON0_IO_POL_DCLK_DRIVE_NEGEDGE
as bit 26 and activating according to bus_flags the same way it is done
for all the other signals polarity.

Fixes: 88bc417856 ("drm: Use new DRM_BUS_FLAG_*_(DRIVE|SAMPLE)_(POS|NEG)EDGE flags")
Suggested-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Giulio Benetti <giulio.benetti@micronovasrl.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20210114081732.9386-1-giulio.benetti@benettiengineering.com
2021-01-14 12:37:28 +01:00
..
Kconfig
Makefile
sun4i_backend.c drm/sun4i: backend: Fix probe failure with multiple backends 2020-11-18 09:01:30 +01:00
sun4i_backend.h
sun4i_crtc.c drm/atomic: Pass the full state to CRTC atomic begin and flush 2020-11-02 12:37:49 +01:00
sun4i_crtc.h
sun4i_dotclock.c
sun4i_dotclock.h
sun4i_drv.c drm/<drivers>: Constify struct drm_driver 2020-11-06 10:31:26 +01:00
sun4i_drv.h
sun4i_framebuffer.c drm/sun4i: Constify static structs 2020-08-18 10:49:13 +02:00
sun4i_framebuffer.h
sun4i_frontend.c drm/sun4i: frontend: Fix the scaler phase on A33 2020-10-26 11:43:30 +01:00
sun4i_frontend.h drm/sun4i: frontend: Rework a bit the phase data 2020-10-26 11:43:30 +01:00
sun4i_hdmi_ddc_clk.c drm/sun4i: hdmi ddc clk: Fix size of m divider 2020-06-10 09:11:49 +02:00
sun4i_hdmi_enc.c drm: sun4i: hdmi: Fix inverted HPD result 2020-07-17 14:03:59 +02:00
sun4i_hdmi_i2c.c
sun4i_hdmi_tmds_clk.c
sun4i_hdmi.h drm/sun4i: hdmi ddc clk: Fix size of m divider 2020-06-10 09:11:49 +02:00
sun4i_layer.c
sun4i_layer.h
sun4i_lvds.c drm/sun4i: Constify static structs 2020-08-18 10:49:13 +02:00
sun4i_lvds.h
sun4i_rgb.c drm/sun4i: Constify static structs 2020-08-18 10:49:13 +02:00
sun4i_rgb.h
sun4i_tcon.c drm/sun4i: tcon: fix inverted DCLK polarity 2021-01-14 12:37:28 +01:00
sun4i_tcon.h drm/sun4i: tcon: fix inverted DCLK polarity 2021-01-14 12:37:28 +01:00
sun4i_tv.c drm/sun4i: Constify static structs 2020-08-18 10:49:13 +02:00
sun6i_drc.c
sun6i_mipi_dsi.c Linux 5.9-rc5 2020-09-14 17:19:11 +02:00
sun6i_mipi_dsi.h
sun8i_csc.c drm/sun4i: Add support for BT2020 to DE3 2021-01-13 10:33:57 +01:00
sun8i_csc.h drm/sun4i: sun8i-csc: Secondary CSC register correction 2020-09-10 13:08:43 +02:00
sun8i_dw_hdmi.c drm/sun4i: dw-hdmi: fix error return code in sun8i_dw_hdmi_bind() 2020-11-17 18:23:00 +01:00
sun8i_dw_hdmi.h drm: bridge: dw-hdmi: Pass drm_display_info to .mode_valid() 2020-06-23 19:56:02 +02:00
sun8i_hdmi_phy_clk.c
sun8i_hdmi_phy.c drm/sun4i: Constify static structs 2020-08-18 10:49:13 +02:00
sun8i_mixer.c drm next for 5.10-rc1 2020-10-15 10:46:16 -07:00
sun8i_mixer.h drm/sun4i: csc: Rework DE3 CSC macros 2021-01-13 10:33:50 +01:00
sun8i_tcon_top.c
sun8i_tcon_top.h
sun8i_ui_layer.c drm/sun4i: Constify static structs 2020-08-18 10:49:13 +02:00
sun8i_ui_layer.h
sun8i_ui_scaler.c
sun8i_ui_scaler.h
sun8i_vi_layer.c drm/sun4i: Add support for BT2020 to DE3 2021-01-13 10:33:57 +01:00
sun8i_vi_layer.h
sun8i_vi_scaler.c
sun8i_vi_scaler.h
sunxi_engine.h