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If SR-IOV is enabled by firmware, even if it is not enabled in the PCI capability, TX pushes using write-combining may be corrupted. We want to know whether it is enabled before mapping the NIC registers, and even if PCI extended capabilities are not accessible. Therefore, we look for the MSI capability, which is removed if SR-IOV is enabled. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
62 lines
2.5 KiB
C
62 lines
2.5 KiB
C
/****************************************************************************
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* Driver for Solarflare Solarstorm network controllers and boards
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* Copyright 2006-2010 Solarflare Communications Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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#ifndef EFX_WORKAROUNDS_H
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#define EFX_WORKAROUNDS_H
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/*
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* Hardware workarounds.
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* Bug numbers are from Solarflare's Bugzilla.
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*/
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#define EFX_WORKAROUND_ALWAYS(efx) 1
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#define EFX_WORKAROUND_FALCON_A(efx) (efx_nic_rev(efx) <= EFX_REV_FALCON_A1)
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#define EFX_WORKAROUND_FALCON_AB(efx) (efx_nic_rev(efx) <= EFX_REV_FALCON_B0)
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#define EFX_WORKAROUND_SIENA(efx) (efx_nic_rev(efx) == EFX_REV_SIENA_A0)
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#define EFX_WORKAROUND_10G(efx) 1
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/* XAUI resets if link not detected */
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#define EFX_WORKAROUND_5147 EFX_WORKAROUND_ALWAYS
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/* RX PCIe double split performance issue */
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#define EFX_WORKAROUND_7575 EFX_WORKAROUND_ALWAYS
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/* Bit-bashed I2C reads cause performance drop */
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#define EFX_WORKAROUND_7884 EFX_WORKAROUND_10G
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/* TX_EV_PKT_ERR can be caused by a dangling TX descriptor
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* or a PCIe error (bug 11028) */
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#define EFX_WORKAROUND_10727 EFX_WORKAROUND_ALWAYS
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/* Transmit flow control may get disabled */
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#define EFX_WORKAROUND_11482 EFX_WORKAROUND_FALCON_AB
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/* Truncated IPv4 packets can confuse the TX packet parser */
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#define EFX_WORKAROUND_15592 EFX_WORKAROUND_FALCON_AB
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/* Legacy ISR read can return zero once */
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#define EFX_WORKAROUND_15783 EFX_WORKAROUND_ALWAYS
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/* Legacy interrupt storm when interrupt fifo fills */
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#define EFX_WORKAROUND_17213 EFX_WORKAROUND_SIENA
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/* Write combining and sriov=enabled are incompatible */
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#define EFX_WORKAROUND_22643 EFX_WORKAROUND_SIENA
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/* Spurious parity errors in TSORT buffers */
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#define EFX_WORKAROUND_5129 EFX_WORKAROUND_FALCON_A
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/* Unaligned read request >512 bytes after aligning may break TSORT */
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#define EFX_WORKAROUND_5391 EFX_WORKAROUND_FALCON_A
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/* iSCSI parsing errors */
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#define EFX_WORKAROUND_5583 EFX_WORKAROUND_FALCON_A
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/* RX events go missing */
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#define EFX_WORKAROUND_5676 EFX_WORKAROUND_FALCON_A
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/* RX_RESET on A1 */
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#define EFX_WORKAROUND_6555 EFX_WORKAROUND_FALCON_A
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/* Increase filter depth to avoid RX_RESET */
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#define EFX_WORKAROUND_7244 EFX_WORKAROUND_FALCON_A
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/* Flushes may never complete */
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#define EFX_WORKAROUND_7803 EFX_WORKAROUND_FALCON_AB
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/* Leak overlength packets rather than free */
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#define EFX_WORKAROUND_8071 EFX_WORKAROUND_FALCON_A
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#endif /* EFX_WORKAROUNDS_H */
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