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71732e2460
Set more registers in force_power_down callback to avoid S3 wakeup from hotplugging cards. This is originally written by Ricky WU. Link: https://lore.kernel.org/lkml/c4525b4738f94483b9b8f8571fc80646@realtek.com/ Cc: Ricky WU <ricky_wu@realtek.com> Tested-by: Ricky WU <ricky_wu@realtek.com> Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com> Link: https://lore.kernel.org/r/20220125055010.1866563-4-kai.heng.feng@canonical.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
264 lines
7.2 KiB
C
264 lines
7.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/* Driver for Realtek PCI-Express card reader
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*
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* Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
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*
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* Author:
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* Wei WANG <wei_wang@realsil.com.cn>
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*/
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/rtsx_pci.h>
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#include "rtsx_pcr.h"
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static u8 rts5229_get_ic_version(struct rtsx_pcr *pcr)
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{
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u8 val;
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rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val);
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return val & 0x0F;
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}
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static void rts5229_fetch_vendor_settings(struct rtsx_pcr *pcr)
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{
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struct pci_dev *pdev = pcr->pci;
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u32 reg;
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pci_read_config_dword(pdev, PCR_SETTING_REG1, ®);
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pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
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if (!rtsx_vendor_setting_valid(reg))
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return;
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pcr->aspm_en = rtsx_reg_to_aspm(reg);
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pcr->sd30_drive_sel_1v8 =
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map_sd_drive(rtsx_reg_to_sd30_drive_sel_1v8(reg));
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pcr->card_drive_sel &= 0x3F;
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pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);
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pci_read_config_dword(pdev, PCR_SETTING_REG2, ®);
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pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
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pcr->sd30_drive_sel_3v3 =
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map_sd_drive(rtsx_reg_to_sd30_drive_sel_3v3(reg));
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}
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static void rts5229_force_power_down(struct rtsx_pcr *pcr, u8 pm_state, bool runtime)
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{
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rtsx_pci_write_register(pcr, FPDCTL, 0x03, 0x03);
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}
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static int rts5229_extra_init_hw(struct rtsx_pcr *pcr)
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{
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rtsx_pci_init_cmd(pcr);
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/* Configure GPIO as output */
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02);
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/* Reset ASPM state to default value */
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0);
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/* Force CLKREQ# PIN to drive 0 to request clock */
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x08, 0x08);
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/* Switch LDO3318 source from DV33 to card_3v3 */
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01);
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/* LED shine disabled, set initial shine cycle period */
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02);
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/* Configure driving */
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DRIVE_SEL,
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0xFF, pcr->sd30_drive_sel_3v3);
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return rtsx_pci_send_cmd(pcr, 100);
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}
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static int rts5229_optimize_phy(struct rtsx_pcr *pcr)
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{
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/* Optimize RX sensitivity */
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return rtsx_pci_write_phy_register(pcr, 0x00, 0xBA42);
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}
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static int rts5229_turn_on_led(struct rtsx_pcr *pcr)
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{
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return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x02);
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}
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static int rts5229_turn_off_led(struct rtsx_pcr *pcr)
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{
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return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x00);
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}
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static int rts5229_enable_auto_blink(struct rtsx_pcr *pcr)
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{
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return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x08);
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}
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static int rts5229_disable_auto_blink(struct rtsx_pcr *pcr)
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{
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return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x00);
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}
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static int rts5229_card_power_on(struct rtsx_pcr *pcr, int card)
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{
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int err;
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rtsx_pci_init_cmd(pcr);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
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SD_POWER_MASK, SD_PARTIAL_POWER_ON);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
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LDO3318_PWR_MASK, 0x02);
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err = rtsx_pci_send_cmd(pcr, 100);
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if (err < 0)
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return err;
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/* To avoid too large in-rush current */
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udelay(150);
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rtsx_pci_init_cmd(pcr);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
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SD_POWER_MASK, SD_POWER_ON);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
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LDO3318_PWR_MASK, 0x06);
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return rtsx_pci_send_cmd(pcr, 100);
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}
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static int rts5229_card_power_off(struct rtsx_pcr *pcr, int card)
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{
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rtsx_pci_init_cmd(pcr);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
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SD_POWER_MASK | PMOS_STRG_MASK,
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SD_POWER_OFF | PMOS_STRG_400mA);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
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LDO3318_PWR_MASK, 0x00);
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return rtsx_pci_send_cmd(pcr, 100);
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}
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static int rts5229_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
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{
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int err;
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if (voltage == OUTPUT_3V3) {
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err = rtsx_pci_write_register(pcr,
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SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_3v3);
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if (err < 0)
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return err;
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err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24);
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if (err < 0)
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return err;
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} else if (voltage == OUTPUT_1V8) {
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err = rtsx_pci_write_register(pcr,
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SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_1v8);
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if (err < 0)
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return err;
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err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C40 | 0x24);
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if (err < 0)
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return err;
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} else {
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return -EINVAL;
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}
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return 0;
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}
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static const struct pcr_ops rts5229_pcr_ops = {
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.fetch_vendor_settings = rts5229_fetch_vendor_settings,
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.extra_init_hw = rts5229_extra_init_hw,
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.optimize_phy = rts5229_optimize_phy,
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.turn_on_led = rts5229_turn_on_led,
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.turn_off_led = rts5229_turn_off_led,
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.enable_auto_blink = rts5229_enable_auto_blink,
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.disable_auto_blink = rts5229_disable_auto_blink,
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.card_power_on = rts5229_card_power_on,
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.card_power_off = rts5229_card_power_off,
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.switch_output_voltage = rts5229_switch_output_voltage,
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.cd_deglitch = NULL,
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.conv_clk_and_div_n = NULL,
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.force_power_down = rts5229_force_power_down,
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};
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/* SD Pull Control Enable:
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* SD_DAT[3:0] ==> pull up
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* SD_CD ==> pull up
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* SD_WP ==> pull up
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* SD_CMD ==> pull up
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* SD_CLK ==> pull down
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*/
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static const u32 rts5229_sd_pull_ctl_enable_tbl1[] = {
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RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
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RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE9),
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0,
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};
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/* For RTS5229 version C */
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static const u32 rts5229_sd_pull_ctl_enable_tbl2[] = {
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RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
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RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD9),
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0,
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};
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/* SD Pull Control Disable:
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* SD_DAT[3:0] ==> pull down
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* SD_CD ==> pull up
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* SD_WP ==> pull down
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* SD_CMD ==> pull down
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* SD_CLK ==> pull down
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*/
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static const u32 rts5229_sd_pull_ctl_disable_tbl1[] = {
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RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
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RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD5),
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0,
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};
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/* For RTS5229 version C */
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static const u32 rts5229_sd_pull_ctl_disable_tbl2[] = {
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RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
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RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE5),
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0,
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};
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/* MS Pull Control Enable:
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* MS CD ==> pull up
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* others ==> pull down
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*/
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static const u32 rts5229_ms_pull_ctl_enable_tbl[] = {
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RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
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RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
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0,
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};
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/* MS Pull Control Disable:
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* MS CD ==> pull up
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* others ==> pull down
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*/
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static const u32 rts5229_ms_pull_ctl_disable_tbl[] = {
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RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
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RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
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0,
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};
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void rts5229_init_params(struct rtsx_pcr *pcr)
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{
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pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104;
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pcr->num_slots = 2;
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pcr->ops = &rts5229_pcr_ops;
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pcr->flags = 0;
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pcr->card_drive_sel = RTSX_CARD_DRIVE_DEFAULT;
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pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
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pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
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pcr->aspm_en = ASPM_L1_EN;
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pcr->aspm_mode = ASPM_MODE_CFG;
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pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 15);
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pcr->rx_initial_phase = SET_CLOCK_PHASE(30, 6, 6);
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pcr->ic_version = rts5229_get_ic_version(pcr);
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if (pcr->ic_version == IC_VER_C) {
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pcr->sd_pull_ctl_enable_tbl = rts5229_sd_pull_ctl_enable_tbl2;
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pcr->sd_pull_ctl_disable_tbl = rts5229_sd_pull_ctl_disable_tbl2;
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} else {
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pcr->sd_pull_ctl_enable_tbl = rts5229_sd_pull_ctl_enable_tbl1;
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pcr->sd_pull_ctl_disable_tbl = rts5229_sd_pull_ctl_disable_tbl1;
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}
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pcr->ms_pull_ctl_enable_tbl = rts5229_ms_pull_ctl_enable_tbl;
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pcr->ms_pull_ctl_disable_tbl = rts5229_ms_pull_ctl_disable_tbl;
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}
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