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5ba3b249c9
Signed-off-by: Philippe Gerum <rpm@xenomai.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
345 lines
9.1 KiB
C
345 lines
9.1 KiB
C
/* -*- linux-c -*-
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* linux/arch/blackfin/kernel/ipipe.c
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*
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* Copyright (C) 2005-2007 Philippe Gerum.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,
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* USA; either version 2 of the License, or (at your option) any later
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* version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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* Architecture-dependent I-pipe support for the Blackfin.
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*/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/percpu.h>
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#include <linux/bitops.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/kthread.h>
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#include <asm/unistd.h>
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#include <asm/system.h>
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#include <asm/atomic.h>
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#include <asm/io.h>
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DEFINE_PER_CPU(struct pt_regs, __ipipe_tick_regs);
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asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs);
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static void __ipipe_no_irqtail(void);
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unsigned long __ipipe_irq_tail_hook = (unsigned long)&__ipipe_no_irqtail;
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EXPORT_SYMBOL(__ipipe_irq_tail_hook);
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unsigned long __ipipe_core_clock;
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EXPORT_SYMBOL(__ipipe_core_clock);
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unsigned long __ipipe_freq_scale;
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EXPORT_SYMBOL(__ipipe_freq_scale);
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atomic_t __ipipe_irq_lvdepth[IVG15 + 1];
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unsigned long __ipipe_irq_lvmask = bfin_no_irqs;
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EXPORT_SYMBOL(__ipipe_irq_lvmask);
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static void __ipipe_ack_irq(unsigned irq, struct irq_desc *desc)
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{
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desc->ipipe_ack(irq, desc);
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}
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/*
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* __ipipe_enable_pipeline() -- We are running on the boot CPU, hw
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* interrupts are off, and secondary CPUs are still lost in space.
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*/
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void __ipipe_enable_pipeline(void)
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{
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unsigned irq;
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__ipipe_core_clock = get_cclk(); /* Fetch this once. */
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__ipipe_freq_scale = 1000000000UL / __ipipe_core_clock;
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for (irq = 0; irq < NR_IRQS; ++irq)
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ipipe_virtualize_irq(ipipe_root_domain,
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irq,
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(ipipe_irq_handler_t)&asm_do_IRQ,
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NULL,
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&__ipipe_ack_irq,
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IPIPE_HANDLE_MASK | IPIPE_PASS_MASK);
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}
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/*
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* __ipipe_handle_irq() -- IPIPE's generic IRQ handler. An optimistic
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* interrupt protection log is maintained here for each domain. Hw
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* interrupts are masked on entry.
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*/
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void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs)
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{
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struct ipipe_percpu_domain_data *p = ipipe_root_cpudom_ptr();
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struct ipipe_domain *this_domain, *next_domain;
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struct list_head *head, *pos;
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int m_ack, s = -1;
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/*
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* Software-triggered IRQs do not need any ack. The contents
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* of the register frame should only be used when processing
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* the timer interrupt, but not for handling any other
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* interrupt.
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*/
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m_ack = (regs == NULL || irq == IRQ_SYSTMR || irq == IRQ_CORETMR);
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this_domain = __ipipe_current_domain;
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if (unlikely(test_bit(IPIPE_STICKY_FLAG, &this_domain->irqs[irq].control)))
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head = &this_domain->p_link;
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else {
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head = __ipipe_pipeline.next;
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next_domain = list_entry(head, struct ipipe_domain, p_link);
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if (likely(test_bit(IPIPE_WIRED_FLAG, &next_domain->irqs[irq].control))) {
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if (!m_ack && next_domain->irqs[irq].acknowledge != NULL)
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next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq));
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if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status))
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s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status);
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__ipipe_dispatch_wired(next_domain, irq);
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goto out;
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}
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}
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/* Ack the interrupt. */
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pos = head;
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while (pos != &__ipipe_pipeline) {
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next_domain = list_entry(pos, struct ipipe_domain, p_link);
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if (test_bit(IPIPE_HANDLE_FLAG, &next_domain->irqs[irq].control)) {
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__ipipe_set_irq_pending(next_domain, irq);
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if (!m_ack && next_domain->irqs[irq].acknowledge != NULL) {
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next_domain->irqs[irq].acknowledge(irq, irq_to_desc(irq));
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m_ack = 1;
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}
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}
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if (!test_bit(IPIPE_PASS_FLAG, &next_domain->irqs[irq].control))
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break;
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pos = next_domain->p_link.next;
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}
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/*
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* Now walk the pipeline, yielding control to the highest
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* priority domain that has pending interrupt(s) or
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* immediately to the current domain if the interrupt has been
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* marked as 'sticky'. This search does not go beyond the
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* current domain in the pipeline. We also enforce the
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* additional root stage lock (blackfin-specific).
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*/
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if (test_bit(IPIPE_SYNCDEFER_FLAG, &p->status))
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s = __test_and_set_bit(IPIPE_STALL_FLAG, &p->status);
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/*
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* If the interrupt preempted the head domain, then do not
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* even try to walk the pipeline, unless an interrupt is
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* pending for it.
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*/
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if (test_bit(IPIPE_AHEAD_FLAG, &this_domain->flags) &&
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ipipe_head_cpudom_var(irqpend_himask) == 0)
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goto out;
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__ipipe_walk_pipeline(head);
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out:
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if (!s)
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__clear_bit(IPIPE_STALL_FLAG, &p->status);
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}
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int __ipipe_check_root(void)
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{
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return ipipe_root_domain_p;
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}
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void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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int prio = __ipipe_get_irq_priority(irq);
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desc->depth = 0;
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if (ipd != &ipipe_root &&
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atomic_inc_return(&__ipipe_irq_lvdepth[prio]) == 1)
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__set_bit(prio, &__ipipe_irq_lvmask);
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}
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EXPORT_SYMBOL(__ipipe_enable_irqdesc);
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void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
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{
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int prio = __ipipe_get_irq_priority(irq);
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if (ipd != &ipipe_root &&
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atomic_dec_and_test(&__ipipe_irq_lvdepth[prio]))
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__clear_bit(prio, &__ipipe_irq_lvmask);
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}
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EXPORT_SYMBOL(__ipipe_disable_irqdesc);
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void __ipipe_stall_root_raw(void)
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{
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/*
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* This code is called by the ins{bwl} routines (see
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* arch/blackfin/lib/ins.S), which are heavily used by the
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* network stack. It masks all interrupts but those handled by
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* non-root domains, so that we keep decent network transfer
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* rates for Linux without inducing pathological jitter for
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* the real-time domain.
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*/
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__asm__ __volatile__ ("sti %0;" : : "d"(__ipipe_irq_lvmask));
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__set_bit(IPIPE_STALL_FLAG,
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&ipipe_root_cpudom_var(status));
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}
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void __ipipe_unstall_root_raw(void)
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{
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__clear_bit(IPIPE_STALL_FLAG,
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&ipipe_root_cpudom_var(status));
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__asm__ __volatile__ ("sti %0;" : : "d"(bfin_irq_flags));
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}
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int __ipipe_syscall_root(struct pt_regs *regs)
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{
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struct ipipe_percpu_domain_data *p;
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unsigned long flags;
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int ret;
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/*
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* We need to run the IRQ tail hook whenever we don't
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* propagate a syscall to higher domains, because we know that
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* important operations might be pending there (e.g. Xenomai
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* deferred rescheduling).
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*/
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if (regs->orig_p0 < NR_syscalls) {
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void (*hook)(void) = (void (*)(void))__ipipe_irq_tail_hook;
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hook();
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if ((current->flags & PF_EVNOTIFY) == 0)
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return 0;
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}
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/*
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* This routine either returns:
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* 0 -- if the syscall is to be passed to Linux;
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* >0 -- if the syscall should not be passed to Linux, and no
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* tail work should be performed;
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* <0 -- if the syscall should not be passed to Linux but the
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* tail work has to be performed (for handling signals etc).
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*/
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if (!__ipipe_event_monitored_p(IPIPE_EVENT_SYSCALL))
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return 0;
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ret = __ipipe_dispatch_event(IPIPE_EVENT_SYSCALL, regs);
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local_irq_save_hw(flags);
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if (!__ipipe_root_domain_p) {
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local_irq_restore_hw(flags);
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return 1;
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}
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p = ipipe_root_cpudom_ptr();
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if ((p->irqpend_himask & IPIPE_IRQMASK_VIRT) != 0)
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__ipipe_sync_pipeline(IPIPE_IRQMASK_VIRT);
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local_irq_restore_hw(flags);
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return -ret;
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}
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unsigned long ipipe_critical_enter(void (*syncfn) (void))
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{
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unsigned long flags;
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local_irq_save_hw(flags);
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return flags;
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}
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void ipipe_critical_exit(unsigned long flags)
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{
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local_irq_restore_hw(flags);
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}
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static void __ipipe_no_irqtail(void)
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{
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}
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int ipipe_get_sysinfo(struct ipipe_sysinfo *info)
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{
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info->ncpus = num_online_cpus();
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info->cpufreq = ipipe_cpu_freq();
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info->archdep.tmirq = IPIPE_TIMER_IRQ;
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info->archdep.tmfreq = info->cpufreq;
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return 0;
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}
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/*
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* ipipe_trigger_irq() -- Push the interrupt at front of the pipeline
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* just like if it has been actually received from a hw source. Also
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* works for virtual interrupts.
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*/
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int ipipe_trigger_irq(unsigned irq)
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{
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unsigned long flags;
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#ifdef CONFIG_IPIPE_DEBUG
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if (irq >= IPIPE_NR_IRQS ||
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(ipipe_virtual_irq_p(irq)
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&& !test_bit(irq - IPIPE_VIRQ_BASE, &__ipipe_virtual_irq_map)))
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return -EINVAL;
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#endif
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local_irq_save_hw(flags);
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__ipipe_handle_irq(irq, NULL);
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local_irq_restore_hw(flags);
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return 1;
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}
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asmlinkage void __ipipe_sync_root(void)
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{
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void (*irq_tail_hook)(void) = (void (*)(void))__ipipe_irq_tail_hook;
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unsigned long flags;
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BUG_ON(irqs_disabled());
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local_irq_save_hw(flags);
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if (irq_tail_hook)
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irq_tail_hook();
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clear_thread_flag(TIF_IRQ_SYNC);
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if (ipipe_root_cpudom_var(irqpend_himask) != 0)
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__ipipe_sync_pipeline(IPIPE_IRQMASK_ANY);
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local_irq_restore_hw(flags);
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}
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void ___ipipe_sync_pipeline(unsigned long syncmask)
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{
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if (__ipipe_root_domain_p) {
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if (test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status)))
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return;
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}
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__ipipe_sync_stage(syncmask);
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}
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EXPORT_SYMBOL(show_stack);
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